HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 321

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
11.1
The SuperH microcomputer has a built-in programmable timing pattern controller (TPC). The
TPC can provide pulse outputs by using the 16-bit integrated-timer pulse unit (ITU) as a time
base. The TPC pulse outputs are divided into 4-bit groups 3–0. These can operate simultaneously,
or independently.
11.1.1
Features of the programmable timing pattern controller are listed below.
Section 11 Programmable Timing Pattern Controller (TPC)
16-bit output data: Maximum 16-bit data can be output. TPC output can be enabled on a bit-
by-bit basis.
Four output groups: Output trigger signals can be selected in 4-bit groups to provide up to four
different 4-bit outputs.
Selectable output trigger signals: Output trigger signals can be selected by group from the
4-channel compare-match signals of the 16-bit integrated-timer pulse unit (ITU).
Non-overlap mode: A non-overlap interval can be set to come between multiple pulse outputs.
Can connect to DMA controller: The compare-match signals selected as output trigger signals
can activate the DMA controller for sequential output of data without CPU intervention.
Overview
Features
RENESAS 303

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