PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 111

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PNX1501E

Manufacturer Part Number
PNX1501E
Description
Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1501E

Product
DSPs
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-795
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
 Details
Other names
PNX1501E,557

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Philips Semiconductors
Volume 1 of 1
Table 3: SYSTEM REGISTERS
5. System Semaphores
12NC 9397 750 14321
Product data sheet
System Endian Mode Registers
Offset 0x06 3014
31:1
0
Bit
Symbol
Unused
BIG_ENDIAN
4.1 System Endian Mode MMIO registers
5.1 Semaphore Specification
5.2 Construction of a 12-bit ID
SYS_ENDIANMODE
PNX15xx Series has 16 simple Multi-Processor (MP) semaphore-assist devices.
They are built out of 32-bit registers, accessible through MMIO by either the local
TM3260 CPU or by any other CPU located on the PCI bus through the aperture made
available on the PCI module.
The semaphores operation is as follows: each master in the system constructs a
personal nonzero 12-bit ID
to do the following actions:
Each of the 16 semaphores behavior is defined by the following pseudo-code:
if (cur_content == 0) {
} else {if (write_value == 0) new_content = 0;}
/* ELSE NO ACTION! */
Layout and offset address of the 16 semaphores is available in
A system based on PNX15xx Series can construct a personal, non-zero 12-bit ID in a
variety of ways:
new_content = write_value;
write the unique ID to one of the 16 semaphores using a 32-bit store. This uses a
32-bit write with the ID in the 12 LSBs
read back the ID. This uses a 32-bit load that returns 0x00000nnn. Then
if (0x00000nnn == ID) {
requested”;
other tasks”
} else {“try again later, or loop back to write”}
Acces
s
-
R/W
“perform the short critical section action for which the semaphore was
“then write 0x00000000 back to the selected semaphore to release it for the
Value
-
0
Rev. 2 — 1 December 2004
Description
To ensure software backward compatibility, writes to unused or
reserved bits should be zero and reads must be ignored.
System endian mode.
‘0’: little endian.
‘1’: big endian.
(Section
5.2). To obtain a semaphore, a master is required
Chapter 3: System On Chip Resources
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
Section
5.5.
3-9

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