PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 216

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
3. Operation
Table 2: XIO Pin Multiplexing
12NC 9397 750 14321
Product data sheet
Signals
PCI Signals
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
PAR
PERR#
SERR#
REQ_A#
REQ_B#
REQ#
GNT_A#
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
I
I
I/O
O
3.1 Overview
68360
16-Bit
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
DSACK
NA
NA
[1] Configuration write can be initiated only when configuration management is enabled.
The Document title variable module supports the 33 MHz PCI spec version 2.2.
Access from external masters may be restricted to word-only if desired. When this
feature is enabled, attempted access with less than a word will result in the PCI slave
terminating the transaction with a target abort or ignoring the write and returning 0 on
read. This behavior is determined by a configuration switch.
When the PCI device can not return data on reads within 16 PCI clocks, the
transactions will terminate in a retry. The read will be completed internally and the
PCI will hold the data exclusively for the initiating agent for the duration of the
“read_lifetime” timer. No other read will be accepted while the timer is active. After the
timer expires, any read request will be accepted. The saved data will be tossed if a
different master requests a read.
Any XIO device(s) can be accessed any time after the PCI configuration space has
been initialized. To be PCI compliant, it will monitor the internal address rather than
the IO pads. At this time, an XIO cycle is run on the PCI pins. PCI pins AD[23:0]
present the address to the device while AD[31:24] contain the data. The PCI CBE
pins are used for XIO control. There are five dedicated pins to be used as chip selects
to the device(s).
The following table shows how the XIO supports various 8- and 16-bit XIO devices.
68360
8-Bit
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
DSACK
NA
NA
NOR
flash
16-Bit
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
Rev. 2 — 1 December 2004
NOR
Flash
8-Bit
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NAND-flash
16-Bit
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
NAND-Flash
8-Bit
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
Chapter 7: PCI-XIO Module
PNX15xx Series
IDE
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
7-4