PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 578
PNX1501E
Manufacturer Part Number
PNX1501E
Description
Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1501E.pdf
(819 pages)
Specifications of PNX1501E
Product
DSPs
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-795
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
Details
Other names
PNX1501E,557
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Philips Semiconductors
Volume 1 of 1
12NC 9397 750 14321
Product data sheet
2.4.1 Task Control
2.4 General Operations
This section provides the details on how the MBS functions. A description of each
functional group is provided.
Since the MBS is capable of processing several video streams in sequence, a
pipelining mechanism is implemented for scaling a sequence of tasks. A task is
described by a data structure stored in memory. Writing the base address of this task
into the Task FIFO schedules the task to be executed after the completion
(processing) of the previously-scheduled tasks.
In addition to the task list in the FIFO, each Task structure in memory can consist of a
linked list of sub tasks that will be executed in sequence (e.g., HD scaling task via
partitioning). The software scheduling algorithm is responsible for preventing the Task
FIFO from overflowing. An interrupt can be generated, once the last task in the FIFO
gets executed, in order to request new tasks from the scheduler. Other interrupt
events also exist and they aid in the task of keeping the task FIFO filled and avoiding
overflow in the four available FIFO slots.
Table 4
32 bit words; therefore, endian mode rules do apply. The command type is defined in
the lower two bits of the 32-bit word. The remaining bits are decoded depending on
the command type.
Figure 5:
shows the opcodes allowed in a descriptor list. The data structure consists of
Task FIFO and Linked List
Rev. 2 — 1 December 2004
FIFO out
FIFO in
Base 2
Base 1
empty
empty
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
Chapter 19: Memory Based Scaler
PNX15xx Series
Descriptor #2 start
Descriptor #1 start
Descriptor #2 end
Descriptor #1 end
Memory
Sub-Task Base
Sub-Task start
...
...
...
19-6
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