PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 42

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
Table 4: PNX1500 Interface
12NC 9397 750 14321
Product data sheet
Pin Name
LAN_RX_CLK/
LAN_REF_CLK
LAN_RXD3
LAN_RXD2
LAN_RXD1
LAN_RXD0
LAN_RX_DV
LAN_RX_ER
LAN_MDIO
LAN_MDC
I
IIC_SDA
IIC_SCL
GPIO - Multi-function flexible software I/O and universal serial interface
Each GPIO pin can be individually set/read by software, or connected to a DMA engine that makes it function as a serial
pattern generator or serial observer, so that the software can implement complex bit serial I/O protocols. Typically, it is used
for the IR receiver, IR blaster, switches, lights and serial communications protocols. In addition, any pin with an entry in the
GPIO column of this pin list can be (individually) set to act as a GPIO pin instead of for its primary function. After power-on
reset, every GPIO is set to the input mode to avoid any potential electrical conflict on the board.
GPIO15/WAKEUP
GPIO14/GCLOCK02
GPIO13/GCLOCK01
GPIO12/GCLOCK00
GPIO11/
BOOT_MODE07
GPIO10/
BOOT_MODE06
GPIO09/
BOOT_MODE05
GPIO08/
BOOT_MODE04/
WDOG_OUT
GPIO7
2
C Interface
BGA
Ball
AD17
AD16
AD15
AD23
AF16
AF17
AE16
AE15
AC26
AC25
AC21 BPT3MCHDT5V I/O/D
AE22
AE21
AC16
AC18
AF26
AF25
AE24 BPT3MCHDT5V I/O/D
C8
D8
-
-
-
Pad
Type
IIC3M4SDAT5V
IIC3M4SCLT5V
BPX2T14MCP
BPT3MCHT5V
BPT3MCHT5V
BPT3MCHT5V
BPT3MCHT5V
BPTS3CHP
BPTS3CHP
BPTS3CHP
BPTS3CHP
BPTS3CHP
BPTS3CHP
BPTS3CHP
BPTS3CHP
BPTS1CHP
BPTS1CHP
BPTS3CP
-
-
-
-
Rev. 2 — 1 December 2004
I/O
Type
I/O/D
I/O/D
I/O/D
I/O/D
I/O/D
I/O/D
I/O/D
OUT
I/OD
I/OD
I/O
IN
IN
IN
IN
IN
IN
IN
-
-
-
-
GPIO
#
14
13
12
46
45
44
43
47
48
49
50
15
11
10
9
8
7
-
-
-
-
-
-
-
-
P Description
U MII Receive Clock. Both LAN_TX_CLK and
U
U
U
U
U MII Receive Data Valid.
D MII or RMII Receive Error.
U MII Management data I/O.
U MII Management Data clock.
D Used as a GPIO pin. This pin can also be used as
U
U
U
D Used as a GPIO pin. This pin is 5 V tolerant input.
- I
- I
-
-
-
-
-
-
-
-
-
LAN_RX_CLK have to be connected to the RMII
reference clock in RMII mode.
MII Receive Data
MII Receive Data
MII or RMII Receive Data
MII or RMII Receive Data
the wake-up event once the PNX1500 has been
sent into deep power down mode. This pin is 5 V
tolerant input.
Used as GPIO pins. These pins can also be used to
output internally generated clocks for external
components present on the board
on page
board level 27-33
ringing.
After the power up and boot sequence, these pins
are used as GPIO[11:8] pins. These GPIO pins
must be strapped with resistors to VDD or VSS to
determine the PNX1500 boot mode upon reset.
GPIO[11:10] pins can also be used as input
external interrupt lines for the TM3260. The
software can assert at regular intervals the
WDOG_OUT output pin to prevent an external
watchdog device to reset the entire system. Other
GPIO pins can be used for that feature. These pins
are 5 V tolerant input.
2
2
C serial data. This pin is 5 V tolerant input.
C clock. This pin is 5 V tolerant input.
5-20). GPIO12/GCLOCK00 requires a
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
Chapter 1: Integrated Circuit Data
series resistor to reduce
PNX15xx Series
(Section 2.11.1
1-16