PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 412

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
Table 20: QVCP 1 Registers
12NC 9397 750 14321
Product data sheet
Bit
7:5
4:0
Offset 0x10 E2C8
31
27:16
15:12
11:0
Offset 0x10 E2CC
31:29
28
27
26
Symbol
PF_SIZE_U[2:0]
PF_OFFS_U[4:0]
Enable
FlushCount
Unused
Fetch Start
Unused
VCBM_U2B
VCBM_M2B
VCBM_L2B
Start Fetch
Brightness & Contrast
…Continued
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0x30h
-
0
-
0
0
0
Value
Rev. 2 — 1 December 2004
Description
Size component for Y or R
Number of bits minus 1 (e.g. 7 => 8 bits per component)
Not available when PF_10B_MODE is on.
Offset component for Y or R
Index of MSB position within 32-bit word (0-31)
Not available when PF_10B_MODE is on.
Set this bit to delay the DMA data fetch timing until line number
specified in bit 11:0 is reached.
If disabled, DMA will pre-fetch data for the next field at the end of
current field.
The number of flush pixels to be inserted after the end of a field. If
Start Fetch is enabled this register must contain a large enough
value to flush all pixels out of the pipeline after the last pixel entered
the pixel formatter. (approx. 50)
If enabled (by setting bit 31 to 1), the data fetched from memory will
be delayed until line number set here is reached, ie. the data pre-
fetch is disabled.
The number given here must be set to a value earlier in Y position
than LayerNStartY in 10E230 to prevent from layer underflow.
In non-interlaced mode :
In interlaced mode:
Brightness control bit for upper channel.
VCBM_U2B = 1 if brightness control is activated for the upper
channel.
Brightness control bit for middle channel.
VCBM_M2B = 1 if brightness control is activated for the middle
channel.
Brightness control bit for lower channel.
VCBM_L2B = 1 if brightness control is activated for the lower
channel.
this value is relative to FRAME position. For example, if
LayerNStartY=100, a start fetch position of 98 is deemed earlier
position.
this value is relative to FIELD position. For example, if
LayerNStartY=100, a start fetch position of 52 is deemed one
line too late to start the fetch, because LayerNStartY=100 is
equivalent to field position 100/2=50. Therefore, a start fetch
positon of 48 is a proper one.
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
Chapter 11: QVCP
11-66