PC87109VBE Nuvoton Technology Corporation of America, PC87109VBE Datasheet - Page 19

• Manufacturer Part Number: PC87109VBE
• Description: IC CONTROLLER ADV UART 32-LQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of PC87109VBE

• Features: Transmit Deferral
• Number Of Channels: 2, DUART
• Fifo's: 16 Byte
• Voltage - Supply: 5V
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *PC87109VBE

Bits
Function
Reset State
Extended Mode
The EIR register does not return an encoded value like in the non-extended mode. Each bit represents an event flag and is set to
1 when the corresponding event occurred or is pending, regardless of the setting of the corresponding bit in the IER register. Bits
7 (timer interrupt) is cleared when this register is read. Bit 4 is cleared when this register is read if an 8237 type DMA controller is
used. All other bits are cleared when the corresponding interrupts are acknowledged.
B0
B1
B2
EIR bits
3210
0001
0110
0100
1100
0010
UART, Sharp-IR, SIR Modes
MIR, FIR Modes
CEIR Mode
RXHDL_EV - Receiver High-Data-Level Event.
FIFOs Disabled:
FIFOs Enabled:
TXLDL_EV - Transmitter Low-Data-Level Event.
FIFOs Disabled:
FIFOs Enabled:
LS_EV - Link Status Event.
Set to 1 when a receiver error or break condition is reported.
Note that, when the FIFOs are enabled, the PE, FE and BRK conditions are only reported when the associated
character reaches the bottom of the RX_FIFO. An overrun error (OE) is reported as soon as it occurs.
LS_EV/TXHLT_EV - Link Status/Transmitter Halted Event.
Set to 1 when any of the following conditions occurs:
LS_EV/TXHLT_EV - Link Status/Transmitter Halted.
Set to 1 when a receiver overrun or a transmitter under-run condition occurs.
1. EOF character reaches the bottom of the RX_FIFO
2. Receiver overrun
3. Transmitter under-run
4. Transmitter halted on frame end
Set to 1 when one character is in the receiver holding register.
Set to 1 when the RX_FIFO level is equal to or above the threshold level, or an RX_FIFO time-out has occurred.
Set to 1 when the transmitter holding register is empty.
Set to 1 when the TX_FIFO level is below the threshold level.
Priority
Highest
Second
Second
Level
TMR_EV
Third
N/A
B7
0
None
High-Data-
Level Event
Time-out
Low-Data-Level
Event
Line Status
Receiver
RX_FIFO
Transmitter
Interrupt
SFIF_EV
Type
B6
Figure 3-4. Event Identification Register, Extended Mode
0
Table 3-3. Non-Extended Mode Interrupt Priorities
TXEMP_EV
None
Framing error, or
Data overrun, or
Break event
Receiver holding register full, or RX_FIFO
level equal to or above threshold
At least 1 character in RX_FIFO, and no
character input to or read from the
RX_FIFO for 4 character times
Transmitter holding register or TX_FIFO
empty
Parity error, or
B5
1
Interrupt Source
DMA_EV
19
B4
0
res
B3
0
TXHLT_EV
LS_EV/
Reading the LSR Register
Reading the RXD port, or RX_FIFO
level drops below threshold
Reading the RXD port
Reading the EIR register if this
interrupt is currently the highest
priority pending interrupt, or writing
into the TXD port
B2
0
Interrupt Reset Control
TXLDL_EV
B1
N/A
1
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RXHDL_EV
B0
0