PC87109VBE Nuvoton Technology Corporation of America, PC87109VBE Datasheet - Page 46

• Manufacturer Part Number: PC87109VBE
• Description: IC CONTROLLER ADV UART 32-LQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of PC87109VBE

• Features: Transmit Deferral
• Number Of Channels: 2, DUART
• Fifo's: 16 Byte
• Voltage - Supply: 5V
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *PC87109VBE

4.2.4 DID - Device Identification Register (offset = 0Dh)
This is a read-only register. When read, it returns the PC87109 identification and revision.
The returned value is 2Xh.
B0
B1
B2
B3-7
BUSY -- Busy Status.
This bit is read-only. It is set to 1 whenever a data transfer/receive is in progress. The power management software
Reserved.
DEV_EN -- Device Enable.
When set to 1, the device is enabled.
When this bit is 0, the device is disabled and the following occurs:
NOM -- Normal Operating Mode.
This bit must be set to 1 for normal operation. When this bit is 0, the device is in low power mode and the following
occurs:
can use this bit in order to determine when the device can be shut down.
Write as 0’s.
12. All the register contents are maintained.
13. All the register contents are maintained.
10. DMA control inputs are blocked
11. Bus interface signals are fully functional.
10. The DMA control output (if enabled) is set to its inactive state.
11. DMA control inputs are blocked.
12. Bus interface signals are fully functional.
1. All internal modules are powered down.
2. Accesses to the UIR module registers are inhibited, and the bus is not driven during reads.
3. UART interface output is set to its inactive state.
4. UART interface input is blocked.
5. ID/IRSL[1-0] pins programmed as outputs are not affected.
6. ID/IRSL[1-0] pins programmed as inputs are blocked.
7. IRTX is set to its inactive state.
8. IRRXn inputs are blocked.
9. IRQ and DMA control outputs are floated.
1. All internal modules are powered down.
2. Accesses to all the device’s internal registers are handled normally.
3. UART interface output is set to its inactive state.
4. UART interface input is blocked.
5. ID/IRSL[1-0] pins programmed as outputs are not affected.
6. ID/IRSL[1-0] pins programmed as inputs are blocked.
7. IRTX is set to its inactive state.
8. IRRXn inputs are blocked.
9. The IRQ output is fully functional.
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