PC87109VBE Nuvoton Technology Corporation of America, PC87109VBE Datasheet - Page 37

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PC87109VBE

Manufacturer Part Number
PC87109VBE
Description
IC CONTROLLER ADV UART 32-LQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of PC87109VBE

Features
Transmit Deferral
Number Of Channels
2, DUART
Fifo's
16 Byte
Voltage - Supply
5V
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*PC87109VBE

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PC87109VBE
Manufacturer:
NS
Quantity:
1
3.7.3 SIR_PW - SIR Pulse Width Register
This register determines the width of the transmitted SIR infrared pulses.
The programmed value has no effect on the SIR receiver. After reset, the content of this register is 0.
3.7.4 LCR/BSR - Link Control/Bank Select Registers
These registers are the same as in bank 0.
3.7.5 BFPL - Beginning Flags/Preamble Length Register
Used to program the number of beginning flags and the preamble for MIR and FIR modes respectively.
After reset, the content of this register is 2Ah.
B3-0
B7-4
Bits
Function
Reset State
B3-0
B7-4
Bits
Function
Reset State
B3-0
MPW [3-0] - MIR Signal Pulse Width
Reserved.
Write 0’s.
SPW [3-0] - SIR Signal Pulse Width.
Other encoding are reserved.
Reserved.
Write 0’s.
FPL [3-0] - FIR Preamble Length.
Selects the number of preamble symbols for FIR frames.
Encoding
0000
1101
Encoding
0110
0111
1000
1001
1010
1011
1101
1110
1111
00XX
0100
0101
1100
MBF3
Encoding
B7
res
B7
0
0
0000
0001
0010
0011
0100
3/16 of bit time
1.6 s
Pulse Width
Pulse Width, MDRS = 0
MBF2
Figure 3-22. Beginning Flags/Preamble Length Register
res
B6
B6
0
0
Preamble Length
Reserved
125.0 ns
145.8 ns
166.6 ns
187.5 ns
208.3 ns
229.1 ns
270.8 ns
291.6 ns
312.5 ns
104.1 ns
250.0 ns
83.3 ns
Reserved
Figure 3-21. SIR Pulse Width Register
1
2
3
4
MBF1
Res
B5
B5
0
1
MBF0
37
res
B4
B4
Pulse Width, MDRS = 1
0
0
Reserved
166.6 ns
208.3 ns
250.0 ns
291.6 ns
333.3 ns
374.9 ns
416.6 ns
458.3 ns
500.0 ns
541.6 ns
583.3 ns
625.0 ns
SPW3
FPL3
B3
B3
1
0
SPW2
FPL2
B2
B2
0
0
SPW1
FPL1
B1
B1
0
1
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SPW0
FPL0
B0
B0
0
0

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