PC87109VBE Nuvoton Technology Corporation of America, PC87109VBE Datasheet - Page 50

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PC87109VBE

Manufacturer Part Number
PC87109VBE
Description
IC CONTROLLER ADV UART 32-LQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of PC87109VBE

Features
Transmit Deferral
Number Of Channels
2, DUART
Fifo's
16 Byte
Voltage - Supply
5V
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*PC87109VBE

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Part Number
Manufacturer
Quantity
Price
Part Number:
PC87109VBE
Manufacturer:
NS
Quantity:
1
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6: The receiver pulse width requirements for various jitter values can be obtained by assuming a linear pulse-width/jitter
t
t
F
t
t
t
MISCELLANEOUS TIMING
t
t
t
MJT
MPW
FJT
FPW
DPW
WOD
MRW
MRF
DRT
Symbol
relationship. For example, if the jitter is +/- 10 ns, the width of a single pulse must fall between 84 ns and 165 ns.
t
by the MCPW [2-0] and TXHSC bits in the IRTXMC and RCCFG registers.
t
and TXHSC bits in the IRTXMC and RCCFG registers.
t
for the signal to be accepted by the receiver. These time values are determined by the content of register
IRRXDC and the setting of bit RXHSC in the RCCFG register.
t
t
IRCR2 registers.
CWN
CPN
MMIN
BTN
MWN
is the nominal bit time in UART, Sharp-IR, SIR, MIR and CEIR modes.
is the nominal period of the modulation signal for Sharp-IR and CEIR modes. It is determined by the MCFR [4-0]
is the nominal pulse width of the modulation signal for Sharp-IR and CEIR modes. It is determined
and
is the nominal pulse width for MIR mode. It is determined by the MPW [3-0] and MDRS bits in the MIR_PW and
MIR Leading Edge Jitter.
Percent of Nominal Bit
Duration.
MIR Pulse Width
FIR Data Rate Tolerance.
Percent of Nominal Data Rate.
FIR Leading Edge Jitter.
Percent of Nominal Chip
Duration.
FIR Single Pulse Width
(Note 6)
FIR Double Pulse Width
(Note 6)
IRSL
Inactive
Master Reset Pulse Width
Output Signals Floating From
Reset Active
t
MMAX
n
define the time range within which the period of the incoming sub-carrier signal has to fall in order
Output Delay From Write
Parameter
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver,
Leading Edge Jitter = 0 ns
Receiver,
Leading Edge Jitter = +/- 25 ns
Transmitter
Receiver,
Leading Edge Jitter = 0 ns
Receiver,
Leading Edge Jitter = +/- 25 ns
50
t
MWN
(Note 5)
60 ns
1000
Min
115
115
205
215
80
90
- 15ns
t
MWN
+/-
(1/2) x
+/- 0.01%
+/- 25.0%
+/-
+/-
+/- 6.0%
Max
135
175
150
135
300
310
700
+ 15 ns
0.01
60
2.9
4.0
www.national.com
t
%
%
BTN
%
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns

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