AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 160

• Manufacturer Part Number: AT91SAM9G45-EKES
• Description: KIT EVAL FOR AT91SAM9G45
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91SAM9G45-EKES

• Contents: Board
• Processor To Be Evaluated: SAM9G45
• Data Bus Width: 32 bit
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 50 C
• Minimum Operating Temperature: - 10 C
• Operating Supply Voltage: 1.8 V to 3.3 V
• For Use With/related Products: AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4626953

20.2
20.2.1
20.2.2
20.2.2.1
20.2.2.2
160
External Bus Interface (EBI)
AT91SAM9G45
Description
Embedded Characteristics
External Bus Interface
Static Memory Controller
The External Bus Interface (EBI) is designed to ensure the successful data transfer between
several external devices and the embedded Memory Controller of an ARM-based device.
The Static Memory, DDR, SDRAM and ECC Controllers are all featured external Memory Con-
trollers on the EBI. These external Memory Controllers are capable of handling several types of
external memory and peripheral devices, such as SRAM, PROM, EPROM, EEPROM, Flash,
DDR2 and SDRAM. The EBI operates with 1.8V or 3.3V Power Supply (VDDIOM1).
The EBI also supports the CompactFlash and the NAND Flash protocols via integrated circuitry
that greatly reduces the requirements for external components. Furthermore, the EBI handles
data transfers with up to six external devices, each assigned to six address spaces defined by
the embedded Memory Controller. Data transfers are performed through a 16-bit or 32-bit data
bus, an address bus of up to 26 bits, up to six chip select lines (NCS[5:0]) and several control
pins that are generally multiplexed between the different external Memory Controllers.
The AT91SAM9G45 features an External Bus Interface to interface to a wide range of external
memories and to any parallel peripheral.
• Integrates Three External Memory Controllers:
• Additional logic for NAND Flash and CompactFlash
• Optional Full 32-bit External Data Bus
• Up to 26-bit Address Bus (up to 64 MBytes linear per chip select)
• Up to 6 chip selects, Configurable Assignment:
• 8-, 16- or 32-bit Data Bus
• Multiple Access Modes supported
• Multiple device adaptability
• Multiple Wait State Management
– Static Memory Controller
– DDR2/SDRAM Controller
– SLC Nand Flash ECC Controller
– Static Memory Controller on NCS0
– DDR2/SDRAM Controller (SDCS) or Static Memory Controller on NCS1
– Static Memory Controller on NCS2
– Static Memory Controller on NCS3, Optional NAND Flash support
– Static Memory Controller on NCS4 - NCS5, Optional CompactFlash
– Byte Write or Byte Select Lines
– Asynchronous read in Page Mode supported (4- up to 32-byte page size)
– Control signals programmable setup, pulse and hold time for each Memory Bank
– Programmable Wait State Generation
– External Wait Request
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6438F–ATARM–21-Jun-10
support