AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 950

• Manufacturer Part Number: AT91SAM9G45-EKES
• Description: KIT EVAL FOR AT91SAM9G45
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91SAM9G45-EKES

• Contents: Board
• Processor To Be Evaluated: SAM9G45
• Data Bus Width: 32 bit
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 50 C
• Minimum Operating Temperature: - 10 C
• Operating Supply Voltage: 1.8 V to 3.3 V
• For Use With/related Products: AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4626953

6438F–ATARM–21-Jun-10
• For Trigger Counter at 1:
1. Close the switches on the inputs X
2. Convert Channel X
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 2.
• For Trigger Counter at 2:
1. Close the switches on the inputs X
2. Convert Channel Y
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 3.
• For Trigger Counter at 3:
1. Close the switches on the inputs Y
2. Convert Channel Y
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 4.
• For Trigger Counter at 4:
1. Close the switches on the inputs Y
2. Convert Channel Y
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 5.
• For Trigger Counter at 5:
1. Close the switches on the inputs Y
2. Convert Channel X
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 6.
• For Trigger Counter between 6 and (2
1. Increment Trigger Counter.
2. If Trigger Counter equals (2
result in TSADCC_CDR0 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
tion result in TSADCC_CDR1 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
sponding TSADCC_CDRx and TSADCC_LCDR.
result in TSADCC_CDR2 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
result in TSADCC_CDR3 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
P
P
P
P
M
, subtract TSADCC_CDR1 from the result and store the subtraction
, subtract TSADCC_CDR3 from the result and store the subtraction
, subtract TSADCC_CDR3 from the result and store the subtraction
,, subtract TSADCC_CDR1 from the result and store the subtrac-
and store the result in TSADCC_CDR3.
TSFREQ+1
P
P
P
P
P
TSFREQ+1
), then set Trigger Counter to 0.
and Y
and Y
and Y
and X
and X
M
M
M
M
M
):
during the Sample and Hold Time.
during the Sample and Hold Time.
during the Sample and Hold Time
during the Sample and Hold Time.
during the Sample and Hold Time.
AT91SAM9G45
950