IPR-NIOS Altera, IPR-NIOS Datasheet - Page 243

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 8: Instruction Set Reference
Instruction Set Reference
initi
December 2010 Altera Corporation
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
0
Initializes the instruction cache line associated with address rA.
initi rA
initi r6
Ignoring the tag, initi identifies the instruction cache line associated with the byte address in
ra, and initi invalidates that line.
If the Nios II processor core does not have an instruction cache, the initi instruction
performs no operation.
This instruction is used to initialize the processor’s instruction cache. Immediately after
processor reset, use initi to invalidate each line of the instruction cache.
For more information on instruction cache, refer to the
chapter of the Nios II Software Developer’s Handbook.
Supervisor-only instruction
R
A = Register index of operand rA
23
22
21
20
19
0
18
17
16
15
14
0x29
13
12
11
initialize instruction cache line
10
Cache and Tightly Coupled Memory
9
0
8
Nios II Processor Reference Handbook
7
6
5
4
0x3a
3
2
1
8–57
0