IPR-NIOS Altera, IPR-NIOS Datasheet - Page 290

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

8–104
xori
Referenced Documents
Document Revision History
Table 8–6. Document Revision History (Part 1 of 2)
Nios II Processor Reference Handbook
Operation:
Assembler Syntax:
Example:
Description:
Exceptions:
Instruction Type:
Instruction Fields:
31
December 2010
July 2010
November 2009
March 2009
November 2008
May 2008
October 2007
30
Date
29
A
28
27
26
10.1.0
10.0.0
Version
9.1.0
9.0.0
8.1.0
8.0.0
7.2.0
This chapter references the following documents:
■
■
■
Table 8–6
25
Programming Model
Application Binary Interface
Cache and Tightly Coupled Memory
Handbook
24
B
rB ← rA ^ (0x0000 : IMM16)
xori rB, rA, IMM16
xori r6, r7, 100
Calculates the bitwise logical exclusive OR of rA and (0x0000 : IMM16) and stores the result in
rB.
None
I
A = Register index of operand rA
B = Register index of operand rB
IMM16 = 16-bit unsigned immediate value
Corrected comments delimiter (#) in instruction usage.
Corrected typographical error in cmpgei instruction type.
Added shadow register sets and external interrupt controller support, including rdprs and
wrprs instructions.
Backwards-compatible change to the eret instruction B field encoding.
Maintenance release.
■
■
Added jmpi instruction.
23
Added MMU.
Added an Exceptions section to all instructions.
shows the revision history for this document.
22
21
20
19
chapter of the Nios II Processor Reference Handbook
18
17
chapter of the Nios II Processor Reference Handbook
16
15
IMM16
14
chapter of the Nios II Software Developer’s
bitwise logical exclusive or immediate
13
Changes
12
11
10
9
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
6
5
Referenced Documents
4
0x1c
3
2
1
0