MC56F8122VFAE Freescale Semiconductor, MC56F8122VFAE Datasheet - Page 125

• Manufacturer Part Number: MC56F8122VFAE
• Description: IC DSP 16BIT 40MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8122VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 8 KB
• Operating Supply Voltage: - 0.3 V to + 4 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Rom Size: 8 KB
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C, the internal [dynamic component], is classic C*V
56800E core and standard cell logic.
D, the external [dynamic component], reflects power dissipated on-chip as a result of capacitive loading
on the external pins of the chip. This is also commonly described as C*V
of the IO cell types used on the 56800E reveal that the power-versus-load curve does have a non-zero
Y-intercept.
Note: V
Power due to capacitive loading on output pins is (first order) a function of the capacitive load and
frequency at which the outputs change.
in the IO cells as a function of capacitive load. In these cases:
where:
Because of the low duty cycle on most device pins, power dissipation due to capacitive loads was found
to be fairly low when averaged over a period of time.
E, the external [static component], reflects the effects of placing resistive loads on the outputs of the
device. Sum the total of all V
0.5 for the purposes of these rough calculations. For instance, if there is a total of eight PWM outputs
driving 10mA into LEDs, then P = 8*.5*.01 = 40mW.
In previous discussions, power consumption due to parasitics associated with pure input pins is ignored,
as it is assumed to be negligible.
Freescale Semiconductor
Preliminary
•
•
•
Summation is performed over all output pins with capacitive loads
TotalPower is expressed in mW
Cload is expressed in pF
REFH
is tied to V
TotalPower = Σ((Intercept + Slope*Cload)*frequency/10MHz)
DDA
Table 10-25 IO Loading Coefficients at 10MHz
PDU08DGZ_ME
PDU04DGZ_ME
2
and V
/R or IV to arrive at the resistive load contribution to power. Assume V =
REFLO
56F8322 Technical Data, Rev. 16
Table 10-25
is tied to V
provides coefficients for calculating power dissipated
2
Intercept
SSA
1.15mW
*F CMOS power dissipation corresponding to the
1.3
inside this package.
0.11mW / pF
0.11mW / pF
Slope
2
*F, although simulations on two
Power Consumption
125