MC56F8122VFAE Freescale Semiconductor, MC56F8122VFAE Datasheet - Page 53

• Manufacturer Part Number: MC56F8122VFAE
• Description: IC DSP 16BIT 40MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8122VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 8 KB
• Operating Supply Voltage: - 0.3 V to + 4 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Rom Size: 8 KB
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Preliminary
FCMB12_CONTROL
FCMB12_ID_HIGH
FCMB12_ID_LOW
FCMB12_DATA
FCMB12_DATA
FCMB12_DATA
FCMB12_DATA
FCMB13_CONTROL
FCMB13_ID_HIGH
FCMB13_ID_LOW
FCMB13_DATA
FCMB13_DATA
FCMB13_DATA
FCMB13_DATA
FCMB14_CONTROL
FCMB14_ID_HIGH
FCMB14_ID_LOW
FCMB14_DATA
FCMB14_DATA
FCMB14_DATA
FCMB14_DATA
FCMB15_CONTROL
FCMB15_ID_HIGH
FCMB15_ID_LOW
FCMB15_DATA
FCMB15_DATA
FCMB15_DATA
FCMB15_DATA
Register Acronym
Table 4-27 FlexCAN Registers Address Map (Continued)
FlexCAN is NOT available in the 56F8122 device
Address Offset
56F8322 Technical Data, Rev. 16
$AA
$AC
$AD
$BA
$BC
$BD
$A0
$A1
$A2
$A3
$A4
$A5
$A6
$A8
$A9
$AB
$AE
$B0
$B1
$B2
$B3
$B4
$B5
$B6
$B8
$B9
$BB
$BE
(FC_BASE = $00 F800)
Message Buffer 12 Control / Status Register
Message Buffer 12 ID High Register
Message Buffer 12 ID Low Register
Message Buffer 12 Data Register
Message Buffer 12 Data Register
Message Buffer 12 Data Register
Message Buffer 12 Data Register
Reserved
Message Buffer 13 Control / Status Register
Message Buffer 13 ID High Register
Message Buffer 13 ID Low Register
Message Buffer 13 Data Register
Message Buffer 13 Data Register
Message Buffer 13 Data Register
Message Buffer 13 Data Register
Reserved
Message Buffer 14 Control / Status Register
Message Buffer 14 ID High Register
Message Buffer 14 ID Low Register
Message Buffer 14 Data Register
Message Buffer 14 Data Register
Message Buffer 14 Data Register
Message Buffer 14 Data Register
Reserved
Message Buffer 15 Control / Status Register
Message Buffer 15 ID High Register
Message Buffer 15 ID Low Register
Message Buffer 15 Data Register
Message Buffer 15 Data Register
Message Buffer 15 Data Register
Message Buffer 15 Data Register
Reserved
Register Description
Peripheral Memory Mapped Registers
53