MC56F8122VFAE Freescale Semiconductor, MC56F8122VFAE Datasheet - Page 84

IC DSP 16BIT 40MHZ 48-LQFP

MC56F8122VFAE

Manufacturer Part Number
MC56F8122VFAE
Description
IC DSP 16BIT 40MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8122VFAE

Core Processor
56800
Core Size
16-Bit
Speed
40MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
21
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Data Bus Width
16 bit
Processor Series
MC56F81xx
Core
56800E
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Operating Supply Voltage
- 0.3 V to + 4 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Rom Size
8 KB
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC56F8122VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
6.5.2.3
When 1, the COPR bit indicates the Computer Operating Properly (COP) timer-generated reset has
occurred. This bit will be cleared by a Power-On Reset or by software. Writing a 0 to this bit position will
set the bit, while writing a 1 to the bit will clear it.
6.5.2.4
If 1, the EXTR bit indicates an external system reset has occurred. This bit will be cleared by a Power-On
Reset or by software. Writing a 0 to this bit position will set the bit while writing a 1 to the bit position will
clear it. Basically, when the EXTR bit is 1, the previous system reset was caused by the external RESET
pin being asserted low.
6.5.2.5
When 1, the POR bit indicates a Power-On Reset occurred some time in the past. This bit can be cleared
only by software or by another type of reset. Writing a 0 to this bit will set the bit, while writing a 1 to the
bit position will clear the bit. In summary, if the bit is 1, the previous system reset was due to a Power-On
Reset.
6.5.2.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.3
Only SIM_SCR0 is shown in this section. SIM_SCR1, SIM_SCR2, and SIM_SCR3 are identical in
functionality.
6.5.3.1
This register is reset only by the Power-On Reset (POR). It has no part-specific functionality and is
intended for use by a software developer to contain data that will be unaffected by the other reset sources
(RESET pin, software reset, and COP reset).
84
Base + $2
Read
Write
POR
SIM Software Control Registers (SIM_SCR0, SIM_SCR1, SIM_SCR2,
and SIM_SCR3)
COP Reset (COPR)—Bit 4
External Reset (EXTR)—Bit 3
Power-On Reset (POR)—Bit 2
Reserved—Bits 1–0
Software Control Data 1 (FIELD)—Bits 15–0
15
0
Figure 6-5 SIM Software Control Register 0 (SIM_SCR0)
14
0
13
0
12
0
56F8322 Techncial Data, Rev. 16
11
0
10
0
9
0
FIELD
8
0
7
0
6
0
5
0
4
0
3
0
Freescale Semiconductor
2
0
1
0
Preliminary
0
0

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