MC56F8345VFGE Freescale Semiconductor, MC56F8345VFGE Datasheet - Page 13

• Manufacturer Part Number: MC56F8345VFGE
• Description: IC DSP 16BIT 60MHZ 128-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8345VFGE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 49
• Program Memory Size: 136KB (68K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 128-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 49
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Note:
Note:
Freescale Semiconductor
Preliminary
* EMI not functional in this package; since only part of
the address/data bus is bonded out, use as GPIO pins
JTAG Port
Controller
External
Module
Linking
Flash memories are encapsulated within the Flash Memory (FM) Module. Flash control is
accomplished by the I/O to the FM over the peripheral bus, while reads and writes are completed
between the core and the Flash memories.
The primary data RAM port is 32 bits wide. Other data ports are 16 bits.
CHIP
TAP
TAP
NOT available on the 56F8145 device.
5
JTAG / EOnCE
56800E
cdbr_m[31:0]
xdb2_m[15:0
pdb_m[15:0]
cdbw[31:0]
Figure 1-1 System Bus Interfaces
xab1[23:0]
xab2[23:0]
pab[20:0]
56F8345 Technical Data, Rev. 17
Data RAM
IPBus
Bridge
IPBus
Program
Program
EMI*
Flash
Data
RAM
Flash
Flash
Boot
11
4
6
Memory
Module
Flash
Architecture Block Diagram
To Flash
Control
Logic
Address
Data
Control
13