MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 127

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.5.5 Timer Counter Registers
Read: Anytime
Write: Only in special modes; has no effect in normal modes
Use a double-byte read instruction to read the timer counter. Two single-byte reads return a different
value than a double-byte read.
12.5.6 Timer System Control Register
Read: Anytime
Write: Anytime
TEN — Timer Enable Bit
Freescale Semiconductor
TEN enables the timer. Clearing TEN reduces power consumption.
When the timer is disabled, there is no divided-by-64 clock for the PA since the prescaler generates
the M ÷ 64 clock.
1 = Timer enabled
0 = Timer and timer counter disabled
Address: $0084
Address: $0085
Address: $0086
The period of the first count after a write to the TCNT registers may be a
different size because the write is not synchronized with the prescaler
clock.
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
TEN
Figure 12-10. Timer System Control Register (TSCR)
0
0
0
Figure 12-8. Timer Counter Register High (TCNTH)
Figure 12-9. Timer Counter Register Low (TCNTL)
= Unimplemented
= Unimplemented
= Unimplemented
TSWAI
Bit 14
Bit 6
6
0
6
0
6
0
MC68HC812A4 Data Sheet, Rev. 7
TSBCK
Bit 13
Bit 5
5
0
5
0
5
0
NOTE
TFFCA
Bit 12
Bit 4
4
0
4
0
4
0
Bit 11
Bit 3
3
0
3
0
3
0
0
Bit 10
Bit 2
2
0
2
0
2
0
0
Registers and Reset Initialization
Bit 9
Bit 1
1
0
1
0
1
0
0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
0
0
0
0
127