MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 132

IC MCU 16BIT EEPROM 4K 112-LQFP

MC812A4CPVE8

Manufacturer Part Number
MC812A4CPVE8
Description
IC MCU 16BIT EEPROM 4K 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC812A4CPVE8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
83
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC812A
Core
HC12
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
91
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Controller Family/series
68HC12
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Standard Timer Module
12.5.11 Timer Flag Register 1
Read: Anytime
Write: Anytime; writing 1 clears flag; writing 0 has no effect
C7F–C0F — Channel Flags
12.5.12 Timer Flag Register 2
Read: Anytime
Write: Anytime; writing 1 clears flag; writing 0 has no effect
132
These flags are set when an input capture or output compare occurs on the corresponding channel.
Clear a channel flag by writing a 1 to it.
Address: $008E
Address: $008F
The newly selected prescale divisor does not take effect until the next
synchronized edge when all prescale counter stages equal 0.
When the fast flag clear-all bit, TFFCA, is set, an input capture read or an
output compare write clears the corresponding channel flag. TFFCA is in
the timer system control register (TSCR).
Reset:
Reset:
Read:
Read:
Write:
Write:
Bit 7
C7F
Bit 7
TOF
0
0
Value
5
6
7
Figure 12-18. Timer Flag Register 1 (TFLG1)
Figure 12-19. Timer Flag Register 2 (TFLG2)
Table 12-3. Prescaler Selection (Continued)
= Unimplemented
C6F
6
0
6
0
0
MC68HC812A4 Data Sheet, Rev. 7
PR[2:1:0]
101
110
111
C5F
5
0
5
0
0
NOTE
NOTE
C4F
4
0
4
0
0
C3F
Prescaler Divisor
3
0
3
0
0
32
32
32
C2F
2
0
2
0
0
C1F
1
0
1
0
0
Freescale Semiconductor
Bit 0
C0F
Bit 0
0
0
0

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