MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 135

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

CLK1 and CLK0 — Clock Select Bits
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAI — Pulse Accumulator Interrupt Enable Bit
12.5.15 Pulse Accumulator Flag Register
Read: Anytime
Write: Anytime; writing 1 clears the flag; writing 0 has no effect
PAOVF — Pulse Accumulator Overflow Flag
Freescale Semiconductor
CLK1 and CLK0 select the timer counter input clock as shown in
PAOVI enables the pulse accumulator overflow flag, PAOVF, to generate interrupt requests.
PAI enables the pulse accumulator input flag, PAIF, to generate interrupt requests.
PAOVF is set when the 16-bit pulse accumulator overflows from $FFFF to $0000. Clear PAOVF by
writing to the pulse accumulator flag register with PAOVF set.
1 = PAOVF interrupt requests enabled
0 = PAOVF interrupt requests disabled
1 = PAIF interrupt requests enabled
0 = PAIF interrupt requests disabled
1 = Pulse accumulator overflow
0 = No pulse accumulator overflow
Address: $00A1
Reset:
Read:
Write:
Figure 12-22. Pulse Accumulator Flag Register (PAFLG)
Bit 7
0
0
1. Changing the CLKx bits causes an immediate change in
2. When PAE = 0, the timer prescaler clock is always the tim-
= Unimplemented
the timer counter clock input.
er counter clock.
6
0
0
CLK[1:0]
00
01
10
11
MC68HC812A4 Data Sheet, Rev. 7
Table 12-4. Clock Selection
5
0
0
4
0
0
Timer Counter Clock
Timer prescaler clock
3
0
0
PACLK
------------------ -
PACLK
------------------ -
PACLK
65,536
256
Table
2
0
0
(2)
(1)
12-4.
Registers and Reset Initialization
PAOVF
1
0
PAIF
Bit 0
0
135