MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 143

IC MCU 16BIT EEPROM 4K 112-LQFP

MC812A4CPVE8

Manufacturer Part Number
MC812A4CPVE8
Description
IC MCU 16BIT EEPROM 4K 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC812A4CPVE8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
83
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC812A
Core
HC12
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
91
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Controller Family/series
68HC12
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Chapter 13
Multiple Serial Interface (MSI)
13.1 Introduction
The multiple serial interface (MSI) module consists of three independent serial I/O interfaces:
13.2 SCI Features
Serial comunication interface (SCI) features include:
For additional information, refer to
Freescale Semiconductor
Two serial communication interfaces, SCI0 and SCI1
One serial peripheral interface, SPI0
Full-duplex operation
Standard mark/space non-return-to-zero (NRZ) format
13-bit baud rate selection
Programmable 8-bit or 9-bit data format
Separately enabled transmitter and receiver
Separate receiver and transmitter interrupt requests
Two receiver wakeup methods:
Five flags with interrupt-generation capability:
Receiver noise error detection
Receiver framing error detection
Receiver parity error detection
Idle line wakeup
Address mark wakeup
Transmitter empty
Transmission complete
Receiver full
Receiver overrun
Idle receiver input
Port S shares its pins with the multiple serial interface (MSI).
See
13.6 General-Purpose I/O
Chapter 14 Serial Communications Interface Module
MC68HC812A4 Data Sheet, Rev. 7
Ports.
NOTE
(SCI).
143

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