MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 83

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
$FFFF
$C000
$D000
$A000
$B000
$E000
$F000
$0000
$1000
$2000
$3000
$4000
$5000
$6000
$7000
$8000
$9000
INTERNAL SPACE
Register
Figure 8-2. Memory Expansion and Chip-Select Example
WINDEF
CSCTL0
CSCTL1
REGISTERS &
RAM & CS[3:0]
MXAR
MISC
VECTORS
EEPROM
Table 8-3. Example Register Settings
%00111xxx
%0xxxxxxx
x0
EXTERNAL SPACE
0
x4
x5
x6
0
Value
$FFC0–$FFFF
MC68HC812A4 Data Sheet, Rev. 7
$E0
$01
$18
1
x1
1
NOTE 2
x2
2
2
3
x3
NOTE 1
4
x4
PAGE 3
5
x5
Enable EPAGE, DPAGE, PPAGE
Port G bit 0 assigned as extended address
ADDR16
Enables CSP0, CSD, and CS3
Makes CSD follow $0000–$7FFF and CS3
select EPAGE
Puts EPAGE at $0400–$09FF
6
x6
PROGRAM CHIP-SELECT 0: (CSP0)
CHIP-SELECT 3: (CS3)
PROGRAM PAGES: $8000 to $BFFF
x7
$0400 TO $07FF
PAGE 7
x8
x9
$8000 TO $FFFF
xA
xB
Meaning
xC
xD
NOTE 1: Some 4-Kbyte blocks of phys-
ical external data memory can be se-
lected by an access to $0000–$6FFF in
the 64-Kbyte map or as pages 0
through 6 in the data window. On-chip
registers, EEPROM, and EPAGE have
higher priority than CSD.
NOTE 2: The last page of physical pro-
gram memory can be selected by an
access to $C000–$FFFF in the
64-Kbyte map or as page 7 in the pro-
gram window.
DATA WINDOW: $7000 to $7FFF
xE
DATA CHIP-SELECT: (CSD)
$0000 TO $7FFF
PAGE xF
Generation of Chip-Selects
83