MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 185

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.5.5 SS Output
In master mode only, the SS pin can function as a chip-select output for connection to the SS input of a
slave. The master SS output automatically selects the slave by going low for each transmission and
deselects the slave by going high during each idling state.
Enable the SS output by setting the master mode bit, MSTR, the slave-select output enable bit, SSOE,
and the data direction bit of the SS pin. MSTR and SSOE are in SPI control register 1.
15.5.6 Single-Wire Operation
Normally, the SPI operates as a 2-wire interface; it uses its MOSI and MISO pins for transmitting and
receiving.
In single-wire operation, a master SPI uses the MOSI pin for both receiving and transmitting. The MOSI
pin becomes a master out, master in (MOMI) pin. The MISO pin is disconnected from the SPI and is
available as a general-purpose port S I/O pin.
A slave SPI in single-wire operation uses the MISO pin for both receiving and transmitting. The MISO pin
becomes a slave in, slave out (SISO) pin. The MOSI pin is disconnected from the SPI and is available as
a general-purpose I/O pin.
Setting serial pin control bit 0, SPC0, configures the SPI for single-wire operation. The direction of the
single-wire pin depends on its data direction bit.
Freescale Semiconductor
DDRS7
Control Bits
0
0
1
1
MASTER MODE
SSOE
SLAVE MODE
0
1
0
1
Figure 15-8. Single-Wire Operation (SPC0 = 1)
Slave-select input with mode-fault detection
Table 15-1. SS Pin Configurations
MC68HC812A4 Data Sheet, Rev. 7
SERIAL OUT
SERIAL OUT
SPI
SPI
SERIAL IN
SERIAL IN
General-purpose output
Slave-select output
Master Mode
Reserved
DDRS5
DDRS4
SS Pin Function
MOMI
SISO
PS4
PS5
GENERAL-
PURPOSE I/O
GENERAL-
PURPOSE I/O
Slave-select input
Slave Mode
Functional Description
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