MC9S12NE64VTUE Freescale Semiconductor, MC9S12NE64VTUE Datasheet - Page 343
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MC9S12NE64VTUE
Manufacturer Part Number
MC9S12NE64VTUE
Description
IC MCU 64K FLASH EEPROM 80-TQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12NE64VTU.pdf
(554 pages)
Specifications of MC9S12NE64VTUE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Processor Series
S12N
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
125 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12NE64E, DEMO9S12NE64E
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Total Internal Ram Size
8KB
# I/os (max)
70
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.625/3.465V
Operating Supply Voltage (min)
2.357/2.375/3.135V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12NE64VTUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12NE64VTUE
Manufacturer:
FREESCALE
Quantity:
20 000
- Current page: 343 of 554
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11.4.6.1 Frame Structure
A transmitted MII management frame uses the MII_MDIO and MII_MDC pins. This frame has the
following format:
<pre><st><op><phyad><regad><ta><data><idle>
11.4.6.1.1
The preamble (pre) consists of 32 contiguous logic 1 bits on MII_MDIO with 32 corresponding cycles on
MII_MDC to provide the PHY with a pattern that it can use to establish synchronization. The preamble is
optional as determined by NOPRE.
11.4.6.1.2
The start of frame (st) is indicated by a <01> pattern. This pattern ensures transitions from the default logic
1 line state to 0 and then returns to 1.
11.4.6.1.3
The operation code (op) for a read instruction is <10>. For a write operation, the operation code is <01>.
11.4.6.1.4
The PHY address (phyad) is a 5-bit field, allowing up to 32 unique PHY addresses. The first address bit
transmitted is the MSB of the address.
11.4.6.1.5
The register address (regad) is a 5-bit field, allowing 32 individual registers to be addresses within each
PHY. The first register bit transmitted is the MSB of the address.
11.4.6.1.6
The turnaround (ta) field is a two bit time spacing between the register address field and the data field of
an MII management frame to avoid contention on the MII_MDIO signal during a read operation. For a
read transaction, both the MAC and the PHY remain in a high impedance state for the first bit time of the
turnaround. The PHY drives a 0 bit during the second bit time of the turnaround of a read transaction.
During a write transaction, the MAC drives a 1 bit for the first bit time of the turnaround and a 0 bit for
the second bit time of the turnaround.
11.4.6.1.7
The data (data) field is 16 bits wide. The first data bit transmitted and received is the MSB of the data.
11.4.6.1.8
During idle condition (idle), MII_MDIO is in the high impedance state.
Freescale Semiconductor
PRE (Preamble)
ST (Start of Frame)
OP (Operation Code)
PHYAD (PHY Address)
REGAD (Register Address)
TA (Turnaround)
DATA (Data)
IDLE (IDLE Condition)
MC9S12NE64 Data Sheet, Rev. 1.1
Functional Description
343
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