MC9S12NE64VTUE Freescale Semiconductor, MC9S12NE64VTUE Datasheet - Page 83

• Manufacturer Part Number: MC9S12NE64VTUE
• Description: IC MCU 64K FLASH EEPROM 80-TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Processor Series: S12N
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 125 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12NE64E, DEMO9S12NE64E
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 70
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 2.625/3.465V
• Operating Supply Voltage (min): 2.357/2.375/3.135V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: TQFP
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.3.2.8
The FCMD register is the Flash command register.
All CMDB bits are readable and writable during a command write sequence while bit 7 reads 0 and is not
writable.
2.3.2.9
The FCTL register is the Flash control register.
All bits in the FCTL register are readable but are not writable.
The FCTL register is loaded from the Flash Configuration Field byte at $FF0E during the reset sequence,
indicated by F in
Freescale Semiconductor
CMDB[6:0]
Reset
Reset
Field
6-0
W
W
R
R
Flash Command — Valid Flash commands are shown in
listed in
NV7
Flash Command Register (FCMD)
Flash Control Register (FCTL)
F
7
0
0
7
Figure
Table 2-16
= Unimplemented or Reserved
Figure 2-11. Flash Command Register (FCMD - NVM User Mode)
= Unimplemented or Reserved
2-12.
NV6
6
0
6
F
sets the ACCERR flag in the FSTAT register.
Figure 2-12. Flash Control Register (FCTL)
CMDB[6:0]
Table 2-16. Valid Flash Command List
Table 2-15. FCMD Field Descriptions
0x05
0x06
0x20
0x40
0x41
0x47
NV5
MC9S12NE64 Data Sheet, Rev. 1.1
5
0
5
F
NV4
4
0
4
F
Description
Sector Erase Abort
NVM Command
Data Compress
Word Program
Sector Erase
Erase Verify
Mass Erase
CMDB
Table
NV3
F
3
0
3
2-16. Writing any command other than those
NV2
2
0
2
F
Memory Map and Register Definition
NV1
1
0
1
F
NV0
F
0
0
0
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