MC9S12NE64VTUE Freescale Semiconductor, MC9S12NE64VTUE Datasheet - Page 97

• Manufacturer Part Number: MC9S12NE64VTUE
• Description: IC MCU 64K FLASH EEPROM 80-TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Processor Series: S12N
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 125 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12NE64E, DEMO9S12NE64E
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 70
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 2.625/3.465V
• Operating Supply Voltage (min): 2.357/2.375/3.135V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: TQFP
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.4.1.3.6
The sector erase abort command is used to terminate the sector erase operation so that other sectors in the
Flash block are available for read and program operations without waiting for the sector erase operation
to complete. If the sector erase abort command is launched resulting in the early termination of an active
sector erase operation, the ACCERR flag will set after the operation completes as indicated by the CCIF
flag being set. The ACCERR flag sets to inform the user that the sector may not be fully erased and a new
sector erase command must be launched before programming any location in that specific sector. If the
sector erase abort command is launched but the active sector erase operation completes normally, the
ACCERR flag will not set upon completion of the operation as indicated by the CCIF flag being set.
Therefore, if the ACCERR flag is not set after the sector erase abort command has completed, the sector
being erased when the abort command was launched is fully erased. The maximum number of cycles
required to abort a sector erase operation is equal to four FCLK periods (see
FCLKDIV
CCIF flag is set.
Freescale Semiconductor
Register”) plus five bus cycles as measured from the time the CBEIF flag is cleared until the
Sector Erase Abort Command
Since the ACCERR bit in the FSTAT register may be set at the completion
of the sector erase abort operation, a command write sequence is not
allowed to be buffered behind a sector erase abort command write sequence.
The CBEIF flag will not set after launching the sector erase abort command
to indicate that a command must not be buffered behind it. If an attempt is
made to start a new command write sequence with a sector erase abort
operation active, the ACCERR flag in the FSTAT register will be set. A new
command write sequence may be started after clearing the ACCERR flag, if
set.
The sector erase abort command must be used sparingly because a sector
erase operation that is aborted counts as a complete program/erase cycle.
MC9S12NE64 Data Sheet, Rev. 1.1
NOTE
NOTE
Section 2.4.1.1, “Writing the
Functional Description
97