MC9S12NE64VTUE Freescale Semiconductor, MC9S12NE64VTUE Datasheet - Page 95

• Manufacturer Part Number: MC9S12NE64VTUE
• Description: IC MCU 64K FLASH EEPROM 80-TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Processor Series: S12N
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 125 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12NE64E, DEMO9S12NE64E
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 70
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 2.625/3.465V
• Operating Supply Voltage (min): 2.357/2.375/3.135V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: TQFP
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.4.1.3.4
The sector erase command is used to erase the addressed sector in the Flash memory using an embedded
algorithm. If the Flash sector to be erased is in a protected area of the Flash block, the PVIOL flag in the
FSTAT register will set and the sector erase command will not launch. After the sector erase command
has successfully launched, the CCIF flag in the FSTAT register will set after the sector erase operation has
completed unless a second command has been buffered.
Freescale Semiconductor
Clock Register
Loaded
Check
Sector Erase Command
Protection
Violation Check
Access
Error Check
Address, Data,
Command
Buffer Empty Check
Bit Polling for
Command
Completion Check
Read: Register FCLKDIV
1.
2.
3.
Bit FDIVLD set?
Figure 2-25. Example Sector Erase Command Flow
yes
Write: Flash Sector Address
and Dummy Data
Sector Erase Command 0x40
Write: Register FSTAT
Clear bit CBEIF 0x80
Write: Register FCMD
Read: Register FSTAT
no
ACCERR
no
no
yes
MC9S12NE64 Data Sheet, Rev. 1.1
CBEIF
PVIOL
Set?
Set?
Set?
EXIT
CCIF
Set?
Write: Register FCLKDIV
Bit
Bit
Bit
Bit
no
yes
yes
yes
no
Clear bit PVIOL 0x20
Write: Register FSTAT
Write: Register FSTAT
Clear bit ACCERR 0x10
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
Read: Register FSTAT
yes
Next Write?
no
Functional Description
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