MC9S12NE64VTUE Freescale Semiconductor, MC9S12NE64VTUE Datasheet - Page 59

IC MCU 64K FLASH EEPROM 80-TQFP

MC9S12NE64VTUE

Manufacturer Part Number
MC9S12NE64VTUE
Description
IC MCU 64K FLASH EEPROM 80-TQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64VTUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Processor Series
S12N
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
125 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12NE64E, DEMO9S12NE64E
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Total Internal Ram Size
8KB
# I/os (max)
70
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.625/3.465V
Operating Supply Voltage (min)
2.357/2.375/3.135V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
MC9S12NE64VTUE
Manufacturer:
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Quantity:
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1.3
The clock and reset generator provides the internal clock signals for the core and all peripheral modules.
Figure 1-5
chapter for details on clock generation.
1.4
There are eight possible modes of operation available on the MC9S12NE64. Each mode has an associated
default memory map and external bus configuration.
1.4.1
The operating mode out of reset is determined by the states of the MODC, MODB, and MODA pins during
reset. The MODC, MODB, and MODA bits in the MODE register show the current operating mode and
provide limited mode switching during operation. The states of the MODC, MODB, and MODA pins are
latched into these bits on the rising edge of the RESET signal. The ROMCTL signal allows the setting of
the ROMON bit in the MISC register thus controlling whether the internal FLASH is visible in the memory
map. ROMON = 1 means the FLASH is visible in the memory map. The state of the ROMCTL pin is
latched into the ROMON bit in the MISC register on the rising edge of the RESET signal.
Freescale Semiconductor
System Clock Description
Modes of Operation
shows the clock connections from the CRG to all modules. See the CRG block description
Chip Configuration Summary
EXTAL
XTAL
CRG
Figure 1-5. Clock Connections
MC9S12NE64 Data Sheet, Rev 1.0
bus clock
oscillator clock
core clock
VREG_PHY
S12_CORE
FLASH
EPHY
RAM
EMAC
ATD
TIM
PIM
SCI
SPI
IIC
System Clock Description
59

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