MC56F8147VPYE Freescale Semiconductor, MC56F8147VPYE Datasheet - Page 111

• Manufacturer Part Number: MC56F8147VPYE
• Description: IC DSP 16BIT 40MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8147VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Data Ram Size: 4 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 x 12 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.5.7
The CLKO select register can be used to multiplex out any one of the clocks generated inside the clock
generation and SIM modules. The default value is SYS_CLK. All other clocks primarily muxed out are
for test purposes only, and are subject to significant unspecified latencies at high frequencies.
The upper four bits of the GPIOB register can function as GPIO, [A23:20], or as additional clock output
signals. GPIO has priority and is enabled/disabled via the GPIOB_PER. If GPIOB[7:4] are programmed
to operate as peripheral outputs, then the choice between [A23:20] and additional clock outputs is done
here in the CLKOSR. The default state is for the peripheral function of GPIOB[7:4] to be programmed as
[A23:20]. This can be changed by altering [A23:20] as shown in
6.5.7.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.7.2
6.5.7.3
6.5.7.4
6.5.7.5
6.5.7.6
Freescale Semiconductor
Preliminary
•
•
•
•
•
•
•
•
•
•
Base + $A
RESET
0 = Peripheral output function of GPIOB7 is defined to be A23
1 = Peripheral output function of GPIOB7 is defined to be the oscillator_clock (MSTR_OSC, see
Figure
0 = Peripheral output function of GPIOB6 is defined to be A22
1 = Peripheral output function of GPIOB6 is defined to be SYS_CLK2
0 = Peripheral output function of GPIOB5 is defined to be A21
1 = Peripheral output function of GPIOB5 is defined to be SYS_CLK
0 = Peripheral output function of GPIOB4 is defined to be A20
1 = Peripheral output function of GPIOB4 is defined to be the prescaler_clock (FREF in
0 = CLKOUT output is enabled and will output the signal indicated by CLKOSEL
1 = CLKOUT is tri-stated
Read
Write
CLKO Select Register (SIM_CLKOSR)
Reserved—Bits 15–10
Alternate GPIOB Peripheral Function for A23 (A23)—Bit 9
Alternate GPIOB Peripheral Function for A22 (A22)—Bit 8
Alternate GPIOB Peripheral Function for A21 (A21)—Bit 7
Alternate GPIOB Peripheral Function for A20 (A20)—Bit 6
Clockout Disable (CLKDIS)—Bit 5
3-4)
15
0
0
14
0
0
Figure 6-9 CLKO Select Register (SIM_CLKOSR)
13
0
0
12
0
0
56F8347 Technical Data, Rev.11
11
0
0
10
0
0
A23
9
0
A22
8
0
A21
7
0
Figure
A20
6
0
CLK
DIS
5
1
6-9.
4
0
3
0
CLKOSEL
2
0
Figure
Register Descriptions
1
0
3-4)
0
0
111