MC56F8147VPYE Freescale Semiconductor, MC56F8147VPYE Datasheet - Page 22

• Manufacturer Part Number: MC56F8147VPYE
• Description: IC DSP 16BIT 40MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8147VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Data Ram Size: 4 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 x 12 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
Signal Name
(SYS_CLK2)
(prescaler_
(SYS_CLK)
(oscillator_
GPIOB0
GPIOB1
GPIOB2
GPIOB3
GPIOB4
GPIOB5
GPIOB6
GPIOB7
Clock)
clock)
(A16)
(A17)
(A18)
(A19)
(A20)
(A21)
(A22)
(A23)
Pin
No.
33
34
35
36
37
46
47
48
Ball
No.
M1
M2
N4
M4
P3
L1
L3
L2
Schmitt
Schmitt
Output
Output
Output
Output
Output
Input/
Input/
Type
56F8347 Technical Data, Rev.11
enabled
enabled
During
pull-up
pull-up
Reset
Input,
Input,
State
Port B GPIO — These four GPIO pins can be programmed
as input or output pins.
Address Bus — A16 - A19 specify one of the address lines
for external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A16 - A19 and EMI control signals are
tri-stated when the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
After reset, the startup state of GPIOB0 - GPIOB3 (GPIO or
address) is determined as a function of EXTBOOT,
EMI_MODE and the Flash security setting. See
further information on when this pin is configured as an
address pin at reset. In all cases, this state may be changed
by writing to GPIOB_PER.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOB_PUR register.
Port B GPIO — These four GPIO pins can be programmed
as input or output pins.
Address Bus — A20 - A23 specify one of the address lines
for external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), A20–A23 and EMI control signals are tri-stated
when the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
Clock Outputs — can be used to monitor the
prescaler_clock, SYS_CLK, SYS_CLK2 or oscillator-clock
on GPIOB4 through GPIOB7, respectively.
After reset, the default state is GPIO.
These pins can also be used to extend the external address
bus to its full length or to view any of several system clocks.
In these cases, the GPIO_B_PER can be used to individually
disable the GPIO. The CLKOSR register in the SIM ( see
Part
and clock functions.
6.5.7) can then be used to choose between address
Signal Description
Freescale Semiconductor
Table 4-4
Preliminary
for