MC56F8147VPYE Freescale Semiconductor, MC56F8147VPYE Datasheet - Page 113

• Manufacturer Part Number: MC56F8147VPYE
• Description: IC DSP 16BIT 40MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8147VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Data Ram Size: 4 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 x 12 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Preliminary
1. This applies to the four pins that serve as Quad Decoder / Quad Timer / SPI / GPIOC functions. A separate set of control bits
2. Reset configuration
3. Quad Decoder pins are always inputs and function in conjunction with the Quad Timer pins.
GPIO Input
GPIO Output
Quad Timer Input /
Quad Decoder Input
Quad Timer Output /
Quad Decoder Input
SPI input
SPI output
is used for each pin.
Pin Function
Figure 6-10 Overall Control of Pads Using SIM_GPS Control
2
3
Table 6-2 Control of Pads Using SIM_GPS Control
Quad Timer Controlled
0
0
1
1
1
1
SPI Controlled
—
—
—
—
0
1
SIM_ GPS Register
Control Registers
56F8347 Technical Data, Rev.11
GPIO Controlled
—
—
0
0
1
1
0
1
GPIOC_PER Register
—
—
—
—
0
1
0
1
See the “Switch Matrix for Inputs to the Timer”
table in the 56F8300 Peripheral User’s
Manual for the definition of the timer inputs
based on the Quad Decoder Mode
configuration.
of each of the SPI pins.
See SPI controls for determining the direction
I/O Pad Control
Comments
1
Register Descriptions
113