MC56F8147VPYE Freescale Semiconductor, MC56F8147VPYE Datasheet - Page 47

• Manufacturer Part Number: MC56F8147VPYE
• Description: IC DSP 16BIT 40MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8147VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Data Ram Size: 4 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 x 12 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.6 EOnCE Memory Map
Freescale Semiconductor
Preliminary
X:$FF FFFC
X:$FF FFFD
X:$FF FF8A
X:$FF FF8E
X:$FF FF9A
X:$FF FF9B
X:$FF FF9C
X:$FF FF9D
X:$FF FF9E
X:$FF FFA0
X:$FF FFFE
X:$FF FFFF
X:$FF FF90
X:$FF FF91
X:$FF FF92
X:$FF FF93
X:$FF FF94
X:$FF FF95
X:$FF FF96
X:$FF FF97
X:$FF FF98
X:$FF FF99
X:$FF FF9F
Address
OESCR
OBCNTR
OBMSK (32 bits)
—
OBAR2 (32 bits)
—
OBAR1 (24 bits)
—
OBCR (24 bits)
—
OTB (21-24 bits/stage)
—
OTBPR (8 bits)
OTBCR
OBASE (8 bits)
OSR
OSCNTR (24 bits)
—
OCR (bits)
OCLSR (8 bits)
OTXRXSR (8 bits)
OTX / ORX (32 bits)
OTX1 / ORX1
Register Acronym
Table 4-8 EOnCE Memory Map
56F8347 Technical Data, Rev.11
Reserved
External Signal Control Register
Reserved
Breakpoint Unit [0] Counter
Reserved
Breakpoint 1 Unit [0] Mask Register
Breakpoint 1 Unit [0] Mask Register
Breakpoint 2 Unit [0] Address Register
Breakpoint 2 Unit [0] Address Register
Breakpoint 1 Unit [0] Address Register
Breakpoint 1 Unit [0] Address Register
Breakpoint Unit [0] Control Register
Breakpoint Unit [0] Control Register
Trace Buffer Register Stages
Trace Buffer Register Stages
Trace Buffer Pointer Register
Trace Buffer Control Register
Peripheral Base Address Register
Status Register
Instruction Step Counter
Instruction Step Counter
Control Register
Reserved
Core Lock / Unlock Status Register
Transmit and Receive Status and Control Register
Transmit Register / Receive Register
Transmit Register Upper Word
Receive Register Upper Word
Register Name
EOnCE Memory Map
47