MC56F8147VPYE Freescale Semiconductor, MC56F8147VPYE Datasheet - Page 130

IC DSP 16BIT 40MHZ 160-LQFP

MC56F8147VPYE

Manufacturer Part Number
MC56F8147VPYE
Description
IC DSP 16BIT 40MHZ 160-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8147VPYE

Core Processor
56800
Core Size
16-Bit
Speed
40MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
160-LQFP
Data Bus Width
16 bit
Processor Series
MC56F81xx
Core
56800E
Data Ram Size
4 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
76
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
4 x 12 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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1. Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application. Determined on 2s2p ther-
2. Junction to ambient thermal resistance, Theta-JA (R
3. Junction to case thermal resistance, Theta-JC (R
4. Thermal Characterization Parameter, Psi-JT (Ψ
5. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature,
6. See
7. TJ = Junction temperature
130
Junction to ambient
Natural convection
Junction to ambient (@1m/sec)
Junction to ambient
Natural convection
Junction to ambient (@1m/sec)
Junction to case
Junction to center of case
I/O pin power dissipation
Power dissipation
Maximum allowed P
mal test board.
in a horizontal configuration in natural convection. Theta-JA was also simulated on a thermal test board with two internal planes
(2s2p, where “s” is the number of signal layers and “p” is the number of planes) per JESD51-6 and JESD51-7. The correct name
for Theta-JA for forced convection or with the non-single layer boards is Theta-JMA.
plate technique with the cold plate temperature used as the "case" temperature. The basic cold plate measurement technique is
described by MIL-STD 883D, Method 1012.1. This is the correct thermal metric to use to calculate thermal performance when
the package is being used with a heat sink.
of case as defined in JESD51-2. Ψ
ments.
ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
TA = Ambient temperature
TBD = numbers will be available late Q4 2005
Part 12.1
Characteristic
ESD for Human Body Model (HBM)
ESD for Machine Model (MM)
ESD for Charge Device Model (CDM)
Table 10-2 56F8347/56F8147 Electrostatic Discharge (ESD) Protection
for more details on thermal design considerations.
D
Characteristic
JT
Four layer board (2s2p)
Four layer board (2s2p)
Table 10-3 Thermal Characteristics
is a useful value to use to estimate junction temperature in steady-state customer environ-
Comments
JT
56F8347 Technical Data, Rev.11
), is the "resistance" from junction to reference point thermocouple on top center
θJC
θJA
), was simulated to be equivalent to the measured values using the cold
) was simulated to be equivalent to the JEDEC specification JESD51-2
2000
Min
200
500
Symbol
P
R
R
(2s2p)
R
(2s2p)
R
R
P
Ψ
DMAX
P
θJMA
θJMA
θJMA
θJA
θJC
JT
I/O
D
160-pin LQFP
Typ
P
Value
38.5
35.4
31.5
8.6
0.8
33
D
(TJ - TA) / R
User-determined
= (I
DD
6
x V
DD
160MAPBGA
Max
θ
+ P
JA
Value
34.66
31.24
TBD
TBD
TBD
TBD
7
I/O
Freescale Semiconductor
)
Unit
V
V
V
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
W
W
W
Preliminary
Notes
1, 2
1, 2
4, 5
2
2
3

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