MC56F8147VPYE Freescale Semiconductor, MC56F8147VPYE Datasheet - Page 144

IC DSP 16BIT 40MHZ 160-LQFP

MC56F8147VPYE

Manufacturer Part Number
MC56F8147VPYE
Description
IC DSP 16BIT 40MHZ 160-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8147VPYE

Core Processor
56800
Core Size
16-Bit
Speed
40MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
160-LQFP
Data Bus Width
16 bit
Processor Series
MC56F81xx
Core
56800E
Data Ram Size
4 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
76
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
4 x 12 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
MC56F8147VPYE
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Part Number:
MC56F8147VPYE
Manufacturer:
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Quantity:
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144
1. Parameters listed are guaranteed by design.
Clock (SCK) low time
Master
Slave
Data set-up time required for inputs
Master
Slave
Data hold time required for inputs
Master
Slave
Access time (time to data active from
high-impedance state)
Slave
Disable time (hold time to high-impedance state)
Slave
Data Valid for outputs
Master
Slave (after enable edge)
Data invalid
Master
Slave
Rise time
Master
Slave
Fall time
Master
Slave
Characteristic
Table 10-18 SPI Timing
56F8347 Technical Data, Rev.11
Symbol
t
t
t
t
t
DS
DH
t
t
DV
t
CL
t
DI
D
R
A
F
1
(Continued)
24.1
Min
4.8
3.7
25
20
0
0
2
0
0
Max
15.2
20.4
11.5
10.0
4.5
9.7
9.0
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Freescale Semiconductor
10-10, 10-11,
10-10, 10-11,
10-10, 10-11,
10-10, 10-11,
10-10, 10-11,
10-10, 10-11,
10-12,
10-12,
10-12,
10-12,
10-12,
See Figure
10-12
10-13
10-13
10-13
10-13
10-13
10-13
10-13
10-13
Preliminary

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