ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 204

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Region enable bit.
For information about access permission, see
10.23.5.1
10.23.6
204
SAM3S Preliminary
MPU access permission attributes
SIZE field values
The SIZE field defines the size of the MPU memory region specified by the RNR. as follows:
The smallest permitted region size is 32B, corresponding to a SIZE value of 4.
example SIZE values, with the corresponding region size and value of N in the RBAR.
Table 10-36. Example SIZE field values
1.
This section describes the MPU access permission attributes. The access permission bits, TEX,
C, B, S, AP, and XN, of the RASR, control access to the corresponding memory region. If an
access is made to an area of memory without the required permissions, then the MPU generates
a permission fault.
Table 10-37
Table 10-37. TEX, C, B, and S encoding
SIZE value
b00100 (4)
b01001 (9)
b10011 (19)
b11101 (29)
b11111 (31)
TEX
b000
In the RBAR, see
(Region size in bytes) = 2
C
0
1
page
shows the encodings for the TEX, C, B, and S access permission bits.
B
0
1
0
1
Region size
32B
1KB
1MB
1GB
4GB
202.
“MPU access permission attributes”
S
x
x
0
1
0
1
(1)
(1)
“MPU Region Base Address Register” on
Memory type
Strongly-
ordered
Device
Normal
Normal
Value of
N
5
10
20
30
b01100
(1)
(SIZE+1)
Shareability
Shareable
Shareable
Not
shareable
Shareable
Not
shareable
Shareable
Note
Minimum permitted
size
-
-
-
Maximum possible
size
.
Other attributes
-
-
Outer and inner write-through. No write
allocate.
Outer and inner write-back. No write
allocate.
6500C–ATARM–8-Feb-11
Table 10-36
gives