ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 821

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

35.14.6
Name:
Address:
Access:
This register is write-protected while CMDRDY is 0 in HSMCI_SR. If an Interrupt command is sent, this register is only
writeable by an interrupt response (field SPCMD). This means that the current command execution cannot be interrupted
or modified.
• CMDNB: Command Number
This is the command index.
• RSPTYP: Response Type
• SPCMD: Special Command
6500C–ATARM–8-Feb-11
Value
Value
31
23
15
–
–
–
7
0
1
2
3
0
1
2
3
4
HSMCI Command Register
RSPTYP
NORESP
136_BIT
30
22
14
CE_ATA
IT_CMD
48_BIT
HSMCI_CMDR
0x40000014
Write-only
–
–
–
6
Name
Name
SYNC
R1B
STD
INIT
Description
Not a special CMD.
Initialization CMD:
74 clock cycles for initialization sequence.
Synchronized CMD:
Wait for the end of the current data block transfer before sending the pending command.
CE-ATA Completion Signal disable Command.
The host cancels the ability for the device to return a command completion signal on the
command line.
Interrupt command:
Corresponds to the Interrupt Mode (CMD40).
Description
No response.
48-bit response.
136-bit response.
R1b response type
29
21
13
–
–
5
MAXLAT
TRTYP
28
20
12
–
4
BOOT_ACK
OPDCMD
27
19
11
3
CMDNB
ATACS
TRDIR
26
18
10
2
SAM3S Preliminary
SPCMD
25
17
9
1
IOSPCMD
TRCMD
24
16
8
0
821