ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 205

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6500C–ATARM–8-Feb-11
Table 10-37. TEX, C, B, and S encoding (Continued)
1.
Table 10-38
range 4-7.
Table 10-38. Cache policy for memory attribute encoding
Table 10-39
unprivileged software.
Table 10-39. AP encoding
TEX
b001
b010
b1B
B
Encoding, AA or BB
00
01
10
11
AP[2:0]
000
001
010
011
100
The MPU ignores the value of this bit.
C
0
1
0
1
A
Privileged
permissions
No access
RW
RW
RW
Unpredictable
shows the cache policy for memory attribute encodings with a TEX value is in the
shows the AP encodings that define the access permissions for privileged and
B
0
1
0
1
0
1
x
A
(1)
S
0
1
x
x
0
1
x
x
x
0
1
(1)
(1)
(1)
(1)
(1)
Corresponding cache policy
Non-cacheable
Write back, write and read allocate
Write through, no write allocate
Write back, no write allocate
Memory type
Normal
Reserved encoding
Implementation defined
attributes.
Normal
Device
Reserved encoding
Reserved encoding
Normal
Unprivileged
permissions
No access
No access
RO
RW
Unpredictable
Shareability
Not
shareable
Shareable
Not
shareable
Shareable
Not
shareable
Not
shareable
Shareable
Description
All accesses generate a permission fault
Access from privileged software only
Writes by unprivileged software generate a permission
fault
Full access
Reserved
Other attributes
-
-
Outer and inner write-back. Write and
read allocate.
Nonshared Device.
-
-
SAM3S Preliminary
205