ST72F561K9TA STMicroelectronics, ST72F561K9TA Datasheet - Page 125

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ST72F561K9TA

Manufacturer Part Number
ST72F561K9TA
Description
IC MCU 8BIT 60K FLASH 32-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F561K9TA

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
497-8374 - BOARD DEVELOPMENT FOR ST72F561
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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LINSCI™ SERIAL COMMUNICATION INTERFACE (SCI Mode) (cont’d)
10.7.5 SCI Mode - Functional Description
Conventional Baud Rate Generator Mode
The block diagram of the Serial Control Interface
in conventional baud rate generator mode is
shown in
It uses four registers:
– 2 control registers (SCICR1 and SCICR2)
– A status register (SCISR)
– A baud rate register (SCIBRR)
Extended Prescaler Mode
Two additional prescalers are available in extend-
ed prescaler mode. They are shown in
– An extended prescaler receiver register (SCIER-
– An extended prescaler transmitter register (SCI-
Figure 78. Word Length Programming
PR)
ETPR)
Figure
9-bit Word length (M bit is set)
Start
Bit
8-bit Word length (M bit is reset)
Start
Bit
1.
Bit0
Bit0
Bit1
Bit1
Break Character
Data Character
Idle Line
Break Character
Data Character
Idle Line
Bit2
Bit2
Bit3
Bit3
Figure
Bit4
Bit4
3.
Bit5
Bit5
10.7.5.1 Serial Data Format
Word length may be selected as being either 8 or 9
bits by programming the M bit in the SCICR1 reg-
ister (see
The TDO pin is in low state during the start bit.
The TDO pin is in high state during the stop bit.
An Idle character is interpreted as a continuous
logic high level for 10 (or 11) full bit times.
A Break character is a character with a sufficient
number of low level bits to break the normal data
format followed by an extra “1” bit to acknowledge
the start bit.
Bit6
Bit6
Possible
Bit7
Parity
Figure
Bit7
Bit
Possible
Parity
Bit8
Bit
Stop
Bit
2).
Stop
Bit
Extra
Start
Next
Start
Bit
Bit
’1’
Extra
Next Data Character
Next
Next Data Character
Start
Start
Bit
Bit
’1’
Start
Bit
Start
Bit
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