ST72F561K9TA STMicroelectronics, ST72F561K9TA Datasheet - Page 176

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ST72F561K9TA

Manufacturer Part Number
ST72F561K9TA
Description
IC MCU 8BIT 60K FLASH 32-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F561K9TA

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
497-8374 - BOARD DEVELOPMENT FOR ST72F561
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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ST72561
beCAN CONTROLLER (Cont’d)
10.9.4.2 Reception Handling
For the reception of CAN messages, three
mailboxes organized as a FIFO are provided. In
order to save CPU load, simplify the software and
guarantee data consistency, the FIFO is managed
completely by hardware. The application accesses
the messages stored in the FIFO through the FIFO
output mailbox.
Valid Message
Figure 101. Receive FIFO states
176/265
EMPTY
FMP=0x00
FOVR=0
Release
Mailbox
Valid Message
Received
Release
Mailbox
RFOM=1
Release
Mailbox
RFOM=1
PENDING_1
FMP=0x01
FOVR=0
PENDING_3
FMP=0x11
FOVR=0
PENDING_2
FMP=0x10
FOVR=0
A received message is considered as valid when it
has been received correctly according to the CAN
protocol (no error until the last but one bit of the
EOF field) and It passed through the identifier fil-
tering successfully, see
Filtering.
Valid Message
Received
Valid Message
Received
Release
Mailbox
RFOM=1
Valid Message
Received
Section 0.1.4.3 Identifier
Valid Message
Received
OVERRUN
FMP=0x11
FOVR=1

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