ST72F561K9TA STMicroelectronics, ST72F561K9TA Datasheet - Page 202

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ST72F561K9TA

Manufacturer Part Number
ST72F561K9TA
Description
IC MCU 8BIT 60K FLASH 32-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F561K9TA

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
497-8374 - BOARD DEVELOPMENT FOR ST72F561
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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ST72561
beCAN CONTROLLER (Cont’d)
10.9.8.3 CAN Filter Registers
CAN FILTER CONFIGURATION REG.0 (CFCR0)
All bits of this register are set and cleared by soft-
ware.
Read / Write
Reset Value: 0000 0000 (00h)
Note: To modify the FFAx and FSCx bits, the be-
CAN must be in INIT mode.
Bit 7 = Reserved. Forced to 0 by hardware.
Bits 6:5 = FSC1[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter
1.
Bit 4 = FACT1 Filter Active
The software sets this bit to activate Filter 1. To
modify the Filter 1 registers (CF1R[7:0]), the
FACT1 bit must be cleared.
0: Filter 1 is not active
1: Filter 1 is active
Bit 3 = Reserved. Forced to 0 by hardware.
Bits 2:1 = FSC0[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter
0.
Bit 0 = FACT0 Filter Active
The software sets this bit to activate Filter 0. To
modify the Filter 0 registers (CF0R[0:7]), the
FACT0 bit must be cleared.
0: Filter 0 is not active
1: Filter 0 is active
202/265
7
0
FSC11 FSC10 FACT1
0
FSC01 FSC00 FACT0
0
CAN FILTER CONFIGURATION REG.1 (CFCR1)
All bits of this register are set and cleared by soft-
ware.
Read / Write
Reset Value: 0000 0000 (00h)
Bit 7 = Reserved. Forced to 0 by hardware.
Bits 6:5 = FSC3[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter
3.
Bit 4 = FACT3 Filter Active
The software sets this bit to activate filter 3. To
modify the Filter 3 registers (CF3R[0:7]) the
FACT3 bit must be cleared.
0: Filter 3 is not active
1: Filter 3 is active
Bit 3 = Reserved. Forced to 0 by hardware.
Bits 2:1 = FSC2[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter
2.
Bit 0 = FACT2 Filter Active
The software sets this bit to activate Filter 2. To
modify the Filter 2 registers (CF2R[0:7]), the
FACT2 bit must be cleared.
0: Filter 2 is not active
1: Filter 2 is active
7
0
FSC31 FSC30 FACT3
0
FSC21 FSC20 FACT2
0

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