ST72F561K9TA STMicroelectronics, ST72F561K9TA Datasheet - Page 170

• Manufacturer Part Number: ST72F561K9TA
• Description: IC MCU 8BIT 60K FLASH 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F561K9TA

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: 497-8374 - BOARD DEVELOPMENT FOR ST72F561
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST72561
10.9 beCAN CONTROLLER (beCAN)
The beCAN controller (Basic Enhanced CAN), in-
terfaces the CAN network and supports the CAN
protocol version 2.0A and B. It has been designed
to manage high number of incoming messages ef-
ficiently with a minimum CPU load. It also meets
the priority requirements for transmit messages.
10.9.1 Main Features
■
■
Transmission
■
■
Reception
■
■
■
■
Management
■
■
Figure 94. CAN Network Topology
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Supports CAN protocol version 2.0 A, B Active
Bit rates up to 1Mbit/s
2 transmit mailboxes
Configurable transmit priority
1 receive FIFO with three stages
6 scalable filter banks
Identifier list feature
Configurable FIFO overrun
Maskable interrupts
Software-efficient mailbox mapping at a unique
address space
CAN Bus
CAN
Rx
CAN
High
Application
ST9 MCU
CAN
Transceiver
CAN
Controller
CAN
CAN
Tx
Low
10.9.2 General Description
In today’s CAN applications, the number of nodes
in a network is increasing and often several net-
works are linked together via gateways. Typically
the number of messages in the system (and thus
to be handled by each node) has significantly in-
creased. In addition to the application messages,
Network Management and Diagnostic messages
have been introduced.
– An enhanced filtering mechanism is required to
Furthermore, application tasks require more CPU
time, therefore real-time constraints caused by
message reception have to be reduced.
– A receive FIFO scheme allows the CPU to be
The standard HLP (Higher Layer Protocol) based
on standard CAN drivers requires an efficient in-
terface to the CAN controller.
– All mailboxes and registers are organized in 16-
handle each type of message.
dedicated to application tasks for a long time pe-
riod without losing messages.
byte pages mapped at the same address and se-
lected via a page select register.