ST72F561K9TA STMicroelectronics, ST72F561K9TA Datasheet - Page 182

• Manufacturer Part Number: ST72F561K9TA
• Description: IC MCU 8BIT 60K FLASH 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F561K9TA

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: 497-8374 - BOARD DEVELOPMENT FOR ST72F561
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST72561
beCAN CONTROLLER (Cont’d)
Figure 104. CAN Error State Diagram
10.9.4.5 Error Management
The error management as described in the CAN
protocol is handled entirely by hardware using a
Transmit Error Counter (TECR register) and a Re-
ceive Error Counter (RECR register), which get in-
cremented or decremented according to the error
condition. For detailed information about TEC and
REC management, please refer to the CAN stand-
ard.
Both of them may be read by software to deter-
mine the stability of the network. Furthermore, the
CAN hardware provides detailed information on
the current error status in CESR register. By
means of CEIER register and ERRIE bit in CIER
register, the software can configure the interrupt
generation on error detection in a very flexible
way.
182/265
When 128 * 11 recessive bits occur:
ERROR ACTIVE
When TEC or REC > 127
When TEC and REC < 128,
BUS OFF
Bus-Off Recovery
The Bus-Off state is reached when TECR is great-
er then 255, this state is indicated by BOFF bit in
CESR register. In Bus-Off state, the beCAN acts
as disconnected from the CAN bus, hence it is no
longer able to transmit and receive messages.
Depending on the ABOM bit in the CMCR register
beCAN will recover from Bus-Off (become error
active again) either automatically or on software
request. But in both cases the beCAN has to wait
at least for the recovery sequence specified in the
CAN standard (128 x 11 consecutive recessive
bits monitored on CANRX).
If ABOM is set, the beCAN will start the recovering
sequence automatically after it has entered Bus-
Off state.
If ABOM is cleared, the software must initiate the
recovering sequence by requesting beCAN to en-
ter initialization mode. Then beCAN starts monitor-
ing the recovery sequence when the beCAN is re-
quested to leave the initialisation mode.
Note: In initialization mode, beCAN does not mon-
itor the CANRX signal, therefore it cannot com-
plete the recovery sequence. To recover, beCAN
must be in normal mode.
ERROR PASSIVE
When TEC > 255