ST72F561K9TA STMicroelectronics, ST72F561K9TA Datasheet - Page 233

• Manufacturer Part Number: ST72F561K9TA
• Description: IC MCU 8BIT 60K FLASH 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F561K9TA

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: 497-8374 - BOARD DEVELOPMENT FOR ST72F561
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

EMC CHARACTERISTICS (Cont’d)
12.8.3 Absolute Maximum Ratings (Electrical
Sensitivity)
Based on two different tests (ESD and LU) using
specific measurement methods, the product is
stressed in order to determine its performance in
terms of electrical sensitivity (see
Table 40
tion note AN1181.
12.8.3.1 Electro-Static Discharge (ESD)
Electro-Static Discharges (a positive then a nega-
tive pulse separated by 1 second) are applied to
the pins of each sample according to each pin
combination. The sample size depends on the
Table 39. Absolute Maximum Ratings
Notes:
1. Data based on characterization results, not tested in production.
Table 40. Electrical Sensitivities
V
V
V
Symbol
ESD(HBM)
ESD(CDM)
ESD(MM)
Symbol
LU
below). For more details, refer to applica-
Electro-static discharge voltage (Human Body Model)
Electro-static discharge voltage (Machine Model)
Electro-static discharge voltage (Charge Device Model)
Static latch-up class
Parameter
Ratings
Table 39
T
conforming to JESD 78
A
and
=+125°C
number of supply pins in the device (3 parts*(n+1)
supply pin). Two models can be simulated: Human
Body Model and Machine Model. This test con-
forms to the JESD22-A114A/A115A standard.
12.8.3.2 Static Latch-Up
■
Conditions
LU: Two complementary static tests are
required on 6 parts to assess the latch-up
performance. A supply overvoltage (applied to
each power supply pin) and a current injection
(applied to each input, output and configurable I/
O pin) are performed on each sample. This test
conforms to the EIA/JESD 78 IC latch-up
standard.
Conditions
T
A
= +25°C
750 on corner pins,
Maximum value
500 on others
2000
200
II level A
Class
ST72561
1)
233/265
Unit
V