ST72F561K9TA STMicroelectronics, ST72F561K9TA Datasheet - Page 137

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ST72F561K9TA

Manufacturer Part Number
ST72F561K9TA
Description
IC MCU 8BIT 60K FLASH 32-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F561K9TA

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
497-8374 - BOARD DEVELOPMENT FOR ST72F561
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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LINSCI™ SERIAL COMMUNICATION INTERFACE (LIN Mode)
10.7.9 LIN Mode - Functional Description.
The block diagram of the Serial Control Interface,
in LIN slave mode is shown in
It uses six registers:
– 3 control registers: SCICR1, SCICR2 and
– 2 status registers: the SCISR register and the
– A baud rate register: LPR mapped at the SCI-
The bits dedicated to LIN are located in the
SCICR3. Refer to the register descriptions in
tion 0.1.10
10.7.9.1 Entering LIN Mode
To use the LINSCI in LIN mode the following con-
figuration must be set in SCICR3 register:
– Clear the M bit to configure 8-bit word length.
– Set the LINE bit.
Master
To enter master mode the LSLV bit must be reset
In this case, setting the SBK bit will send 13 low
bits.
Then the baud rate can programmed using the
SCIBRR, SCIERPR and SCIETPR registers.
In LIN master mode, the Conventional and / or Ex-
tended Prescaler define the baud rate (as in stand-
ard SCI mode)
SCICR3
LHLR register mapped at the SCIERPR address
BRR address and an associated fraction register
LPFR mapped at the SCIETPR address
for the definitions of each bit.
Figure
5.
Sec-
Slave
Set the LSLV bit in the SCICR3 register to enter
LIN slave mode. In this case, setting the SBK bit
will have no effect.
In LIN Slave mode the LIN baud rate generator is
selected instead of the Conventional or Extended
Prescaler. The LIN baud rate generator is com-
mon to the transmitter and the receiver.
Then the baud rate can be programmed using
LPR and LPRF registers.
Note: It is mandatory to set the LIN configuration
first before programming LPR and LPRF, because
the LIN configuration uses a different baud rate
generator from the standard one.
10.7.9.2 LIN Transmission
In LIN mode the same procedure as in SCI mode
has to be applied for a LIN transmission.
To transmit the LIN Header the proceed as fol-
lows:
– First set the SBK bit in the SCICR2 register to
– reset the SBK bit
– Load the LIN Synch Field (0x55) in the SCIDR
– Wait until the SCIDR is empty (TDRE bit set in
– Load the LIN message Identifier in the SCIDR
start transmitting a 13-bit LIN Synch Break
register to request Synch Field transmission
the SCISR register)
register to request Identifier transmission.
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