MCHC705JJ7CPE Freescale Semiconductor, MCHC705JJ7CPE Datasheet - Page 132

• Manufacturer Part Number: MCHC705JJ7CPE
• Description: IC MCU 8BIT 224 BYTES RAM 20PDIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MCHC705JJ7CPE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 14
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: OTP
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC705JJ
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SIOP
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 4 Channel
• Package: 20PDIP
• Family Name: HC05
• Maximum Speed: 2.1 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Instruction Set
132
BHS rel
BIH rel
BIL rel
BIT #opr
BIT opr
BIT opr
BIT opr,X
BIT opr,X
BIT ,X
BLO rel
BLS rel
BMC rel
BMI rel
BMS rel
BNE rel
BPL rel
BRA rel
BRCLR n opr rel
BRSET n opr rel
BRN rel
BSET n opr
Source
Form
Branch if Higher or
Same
Branch if IRQ Pin High
Branch if IRQ Pin Low
Bit Test
Accumulator with
Memory Byte
Branch if Lower
(Same as BCS)
Branch if Lower or
Same
Branch if Interrupt
Mask Clear
Branch if Minus
Branch if Interrupt
Mask Set
Branch if Not Equal
Branch if Plus
Branch Always
Branch if bit n clear
Branch if Bit n Set
Branch Never
Set Bit n
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Operation
Table 14-6. Instruction Set Summary (Sheet 2 of 6)
PC ← (PC) + 2 + rel ? C ∨ Z = 1
PC ← (PC) + 2 + rel ? IRQ = 1
PC ← (PC) + 2 + rel ? IRQ = 0
PC ← (PC) + 2 + rel ? Mn = 0
PC ← (PC) + 2 + rel ? Mn = 1
PC ← (PC) + 2 + rel ? C = 0
PC ← (PC) + 2 + rel ? C = 1
PC ← (PC) + 2 + rel ? N = 1
PC ← (PC) + 2 + rel ? N = 0
PC ← (PC) + 2 + rel ? Z = 0
PC ← (PC) + 2 + rel ? 1 = 1
PC ← (PC) + 2 + rel ? 1 = 0
PC ← (PC) + 2 + rel ? I = 0
PC ← (PC) + 2 + rel ? I = 1
Description
(A) ∧ (M)
Mn ← 1
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H
on CCR
I
Effect
N Z C
—
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
Freescale Semiconductor
REL
REL
REL
IMM
EXT
REL
REL
REL
REL
REL
REL
REL
REL
REL
DIR
IX2
IX1
IX
2F
2E
A5
B5
C5
D5
E5
F5
2C
2B
2D
2A
0B
0D
0F
0A
0C
0E
1A
1C
1E
24
25
23
26
20
01
03
05
07
09
00
02
04
06
08
21
10
12
14
16
18
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
ee ff
hh ll
dd
dd
dd
dd
dd
dd
dd
dd
dd
rr
rr
rr
rr
rr
rr
rr
rr
rr
rr
rr
rr
ff
p
ii
3
3
3
2
3
4
5
4
3
3
3
3
3
3
3
3
3
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3
5
5
5
5
5
5
5
5