MCHC705JJ7CPE Freescale Semiconductor, MCHC705JJ7CPE Datasheet - Page 88

• Manufacturer Part Number: MCHC705JJ7CPE
• Description: IC MCU 8BIT 224 BYTES RAM 20PDIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MCHC705JJ7CPE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 14
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: OTP
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC705JJ
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SIOP
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 4 Channel
• Package: 20PDIP
• Family Name: HC05
• Maximum Speed: 2.1 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Analog Subsystem
88
Point
0
1
2
3
Begin initial discharge and select mode 3 by
clearing CHG and setting ATD2 and ATD1 in
the ACR. Also set ICEN bit in ACR and IEDG
bit in TCR.
V
registers (OCRH and OCRL) to desired
charge start time.
Stop discharge and begin charge when the
next OCF sets the CHG control bit in ACR.
V
trips, setting CPF2 and CMP2, which causes
an ICF from the timer and clears the CHG
control bit in ACR. Must clear CPF2 to trap
next CPF2 flag. Load next OCF.
COMP2
CAP
CAP
(TCAP)
V
CHG
OCF
TOF
CAP
ICF
V
falls to V
rises to V
X
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
0
SS
X
Figure 8-11. A/D Conversion — OCF/ICF Control (Mode 3)
. Set timer output compare
and comparator 2 output
Action
1
(MIN)
t
DIS
t
DIS
2
t
CHG
Software write
Wait out minimum t
Software write to OCRH, OCRL
Timer OCF sets the CHG control bit
in the ACR.
Wait out t
Timer ICF clears the CHG control bit
in the ACR.
Software/Hardware Action
CHG
3
time.
1
DIS
(MIN)
t
DIS
time.
2
Software
V
Free-running timer
output compare, f
V
V
MAX
X
V
Dependent Variable(s)
MAX
, I
X
Freescale Semiconductor
=
CHG
, I
t
DIS
CHG
, C
C
, C
EXT
x I
EXT
CHG
EXT
, software
OSC