R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 103
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
10.3
10.3.1
10.3.2
10.3.3
10.3.4
10.3.5
10.3.6
10.3.7
There are two type clocks: a CPU clock to operate the CPU and a peripheral function clock to operate the
peripheral functions. Refer to Figure 10.1 Clock Generation Circuit.
The system clock is a clock source for the CPU and peripheral function clocks. The XIN clock or on-chip
oscillator clock can be selected.
The CPU clock is an operating clock for the CPU and watchdog timer.
The system clock can be the divide-by-1 (no division), 2, 4, 8 or 16 to produce the CPU clock. Use the CM06
bit in the CM0 register and the CM16 to CM17 bits in the CM1 register to select the value of the division.
After reset, the low-speed on-chip oscillator clock divided-by-8 provides the CPU clock.
When entering stop mode, the CM06 bit is set to 1 (divide-by-8 mode).
The peripheral function clock is operating clock for the peripheral functions.
The clock fi (i = 1, 2, 4, 8, 32) is generated by the system clock divided-by-i. The clock fi is used for timers
RA, RB, RD, RE, serial interface, A/D converter and CAN module.
The clock fCAN0 is generated by the f1 clock divided-by-1(no-division), -2, -4, -8, or -16, and is used for CAN
module.
When the WAIT instruction is executed after setting the CM02 bit in the CM0 register to 1 (peripheral function
clock stops in wait mode), the clock fi and fCAN0 stop.
NOTE:
fOCO is operating clocks for the peripheral functions.
The fOCO run at the same frequency as the on-chip oscillator clock and can be used as the source for the timer
RA.
When the WAIT instruction is executed, the clocks fOCO does not stop.
fOCO40M is used as the count source for the timer RD. The fOCO40M is generated by the high-speed on-chip
oscillator and provided by setting the FRA00 bit to 1.
When the WAIT instruction is executed, the clock fOCO40M does not stop.
fOCO40M can be used with supply voltage VCC = 3.0 to 5.5V.
fOCO-F is used as the count source for the AD converter. The fOCO-F is generated by the high-speed on-chip
oscillator and provided by setting the FRA00 bit to 1.
When the WAIT instruction is executed, the clock fOCO-F does not stop.
fOCO-S is an operating clock for the watchdog timer and voltage detection circuit. When setting the CM14 bit
to 0 (low-speed on-chip oscillator on) using the clock generated by the low-speed on-chip oscillator, the fOCO-
S can be provided. When the WAIT instruction is executed or in count source protect mode of the watchdog
timer, the clock fOCO-S does not stop.
CPU Clock and Peripheral Function Clock
1. fCAN0 clock stops at high level in CAN0 sleep mode.
System Clock
CPU Clock
Peripheral Function Clock (f1, f2, f4, f8, f32, and fCAN0)
fOCO
fOCO40M
fOCO-F
fOCO-S
Page 81 of 501
(1)
10. Clock Generation Circuit
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