R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 293
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (6Mb)
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.117 TRECR1 Register in Output Compare Mode
Figure 14.118 TRECR2 Register in Output Compare Mode
Timer RE Control Register 1
Timer RE Control Register 2
b7 b6 b5 b4
b7 b6 b5 b4
0 0
0
b3 b2
0
b3 b2 b1 b0
0 0
b1 b0
0 0
Bit Symbol
Bit Symbol
TSTART
TRECR1
TRERST
TOENA
(b6-b5)
Symbol
TRECR2
TCSTF
(b4-b0)
(b7-b6)
Symbol
COMIE
Page 271 of 501
(b0)
INT
—
—
—
—
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Timer RE count status flag
TREO pin output enable bit
Interrupt request timing bit
Timer RE reset bit
Reserved bit
Timer RE count start bit
Reserved bit
Compare match interrupt enable bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
Address
Bit Name
011Ch
011Dh
0 : During count stop
1 : In count
0 : Disable clock output
1 : Enable clock output
Set to 0 in output compare mode
When setting this bit to 0 after setting it to
1, the follow ings w ill occur.
• The TRESEC, TREMIN, and TRECR2
• The TCSTF, INT, and TSTART bits in the
• The 8-bit counter is set to 00h and
Set to 0
0 : Count stops
1 : Count starts
Set to 0
0 : Disable compare match interrupt
1 : Enable compare match interrupt
TRECR1 register are set to 0.
registers are set to 00h.
the 4-bit counter is set to 0h.
After Reset
After Reset
Function
Function
00h
00h
14. Timers
RW
RW
RW
RW
RW
RW
RO
—
RW
RW
RW
—
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