R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 202
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.33
14.3.5
TRDIOAi
i = 0 or 1
NOTES:
TRDIOCi
TRDIODi
TRDIOBi
1. When the BFCi bit in the TRDMR register is set to 1 (the TRDGRCi register is used as the buffer register of the TRDGRAi
2. When the BFDi bit in the TRDMR register is set to 1 (the TRDGRDi register is used as the buffer register of the TRDGRBi
3. The trigger input of the TRDGRA0 register can select the TRDIOA0 pin input or fOCO128 signal.
The input capture function is to measure the external signal width and period. The content in the TRDi register
(counter) is transferred to the TRDGRji register as a trigger of the TRDIOji (i = 0 or 1, j = either A, B, C or D)
pin external signal (input capture). Since this function is enabled with a combination of the TRDIOji pin and
TRDGRji register, any of the input capture function, other modes or functions can be selected every pin.
The TRDGRA0 register can also select fOCO128 signal as input-capture trigger input.
Figure 14.33 shows the Block Diagram of Input Capture Function, Table 14.23 lists the Input Capture Function
Specifications. Figures 14.34 to 14.44 show the Registers Associated with Input Capture Function and Figure
14.45 shows the Operating Example of Input Capture Function.
register).
register).
(3)
Input Capture Function
(Note 1)
(Note 2)
Block Diagram of Input Capture Function
Page 180 of 501
Input capture signal
Input capture signal
Input capture signal
Input capture signal
TRDGRAi
TRDGRCi
TRDGRBi
TRDGRDi
register
register
register
register
TRDIOA0
fOCO
TRDi register
Divided
by 128
fOCO128
IOA3 = 0
IOA3 = 1
Input capture
signal
14. Timers
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